added support for the SAMD_21 chip with no EEPROM using the FlashStorage_SAMD emulated EEPROM library
added disable interrupts on the ESP8266 and ESP32 to avoid a crash during FLASH Write of emulated EEPROM bumped version to 2.0.14
This commit is contained in:
13
NmraDcc.cpp
13
NmraDcc.cpp
@@ -47,7 +47,11 @@
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//------------------------------------------------------------------------
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#include "NmraDcc.h"
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#ifdef __SAMD21G18A__
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#include <FlashStorage_SAMD.h>
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#else
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#include "EEPROM.h"
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#endif
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// Uncomment to print DEBUG messages
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// #define DEBUG_PRINT
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@@ -804,9 +808,18 @@ uint8_t readEEPROM (unsigned int CV)
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void writeEEPROM (unsigned int CV, uint8_t Value)
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{
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EEPROM.write (CV, Value) ;
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#if defined(ESP8266) || defined(ESP32)
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noInterrupts();
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#endif
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#if defined(ESP8266) || defined(ESP32) || defined(ARDUINO_ARCH_RP2040)
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EEPROM.commit();
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#endif
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#if defined(ESP8266) || defined(ESP32)
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interrupts();
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#endif
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}
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bool readyEEPROM()
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@@ -128,7 +128,8 @@ typedef struct
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#define PRIO_SYSTIC 8 // MUST be higher priority than DCC Irq
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#elif defined(ARDUINO_ARCH_RP2040)
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#define MAXCV 256 // todo: maybe somebody knows a good define for it
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#elif defined(ARDUINO_SAMD_ZERO)
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#define MAXCV EEPROM_EMULATION_SIZE
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#else
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#define MAXCV E2END // the upper limit of the CV value currently defined to max memory.
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#endif
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@@ -1,5 +1,5 @@
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name=NmraDcc
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version=2.0.13
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version=2.0.14
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author=Alex Shepherd, Wolfgang Kuffer, Geoff Bunza, Martin Pischky, Franz-Peter Müller, Sven (littleyoda), Hans Tanner, bugfixes by Jueff
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maintainer=Alex Shepherd <kiwi64ajs@gmail.com>
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sentence=Enables NMRA DCC Communication
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