Ajout FishPeper

This commit is contained in:
Serge NOEL
2026-04-21 12:19:15 +02:00
parent 6744da3f88
commit 0c361a2440
2160 changed files with 589301 additions and 1 deletions

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CERN Open Hardware Licence v1.2
Preamble
Through this CERN Open Hardware Licence ("CERN OHL") version 1.2, CERN
wishes to provide a tool to foster collaboration and sharing among
hardware designers. The CERN OHL is copyright CERN. Anyone is welcome
to use the CERN OHL, in unmodified form only, for the distribution of
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involvement by CERN in the development of such designs.
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“Licence” means this CERN OHL.
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board layouts, mechanical drawings, flow charts and descriptive text,
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e) license the modified Documentation under the terms and conditions
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Licence. Section 5 shall continue to apply.

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brushless_addon for tinyFISH FC -- convert your tinyFISH fc to brushed
this tiny add-on board will convert the tinyFISH fc into a brushed FC
this is open hardware - see LICENSE for details
THIS COMES WITH NO WARRANTY! BUILD AND USE AT YOUR OWN RISK!

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(kicad_pcb (version 20160815) (host pcbnew "(2016-12-13 revision 188d781)-master")
(general
(links 30)
(no_connects 0)
(area 12.778114 17.21475 44.556143 28.263401)
(thickness 1.6)
(drawings 43)
(tracks 100)
(zones 0)
(modules 24)
(nets 11)
)
(page A4)
(layers
(0 F.Cu signal hide)
(31 B.Cu signal)
(32 B.Adhes user)
(33 F.Adhes user)
(34 B.Paste user)
(35 F.Paste user hide)
(36 B.SilkS user hide)
(37 F.SilkS user hide)
(38 B.Mask user)
(39 F.Mask user hide)
(40 Dwgs.User user)
(41 Cmts.User user)
(42 Eco1.User user)
(43 Eco2.User user)
(44 Edge.Cuts user)
(45 Margin user)
(46 B.CrtYd user hide)
(47 F.CrtYd user hide)
(48 B.Fab user)
(49 F.Fab user)
)
(setup
(last_trace_width 0.1524)
(user_trace_width 1)
(trace_clearance 0.1524)
(zone_clearance 0.2032)
(zone_45_only no)
(trace_min 0.1524)
(segment_width 0.2)
(edge_width 0.15)
(via_size 0.6858)
(via_drill 0.3302)
(via_min_size 0.6858)
(via_min_drill 0.3302)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0)
(uvia_min_drill 0)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.15)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.0762)
(aux_axis_origin 0 0)
(visible_elements FFFDFD7F)
(pcbplotparams
(layerselection 0x010f0_ffffffff)
(usegerberextensions false)
(excludeedgelayer true)
(linewidth 0.100000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15)
(psnegative false)
(psa4output false)
(plotreference false)
(plotvalue false)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 1)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory gerber))
)
(net 0 "")
(net 1 GND)
(net 2 "Net-(Q1-PadD)")
(net 3 "Net-(Q1-PadG)")
(net 4 "Net-(Q2-PadG)")
(net 5 "Net-(Q2-PadD)")
(net 6 "Net-(Q3-PadG)")
(net 7 "Net-(Q3-PadD)")
(net 8 "Net-(Q4-PadD)")
(net 9 "Net-(Q4-PadG)")
(net 10 "Net-(C2-Pad1)")
(net_class Default "This is the default net class."
(clearance 0.1524)
(trace_width 0.1524)
(via_dia 0.6858)
(via_drill 0.3302)
(uvia_dia 0.3)
(uvia_drill 0.1)
(diff_pair_gap 0.25)
(diff_pair_width 0.2)
(add_net GND)
(add_net "Net-(C2-Pad1)")
(add_net "Net-(Q1-PadD)")
(add_net "Net-(Q1-PadG)")
(add_net "Net-(Q2-PadD)")
(add_net "Net-(Q2-PadG)")
(add_net "Net-(Q3-PadD)")
(add_net "Net-(Q3-PadG)")
(add_net "Net-(Q4-PadD)")
(add_net "Net-(Q4-PadG)")
)
(module custom:edge_conn_1mm (layer F.Cu) (tedit 581E38A6) (tstamp 5823F003)
(at 23.801 25.754)
(path /581E2D41)
(fp_text reference TP1 (at 0 0.5) (layer F.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(fp_text value ESC_0 (at 0 -0.5) (layer F.Fab) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(pad 1 thru_hole roundrect (at 0 0) (size 1 1.3) (drill 0.8 (offset 0 -0.1)) (layers *.Cu *.Mask)(roundrect_rratio 0.25)
(net 3 "Net-(Q1-PadG)"))
)
(module custom:edge_conn_1mm (layer F.Cu) (tedit 581E38A6) (tstamp 5823F008)
(at 28.301 25.754)
(path /581E40EC)
(fp_text reference TP2 (at 0 0.5) (layer F.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(fp_text value ESC_1 (at 0 -0.5) (layer F.Fab) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(pad 1 thru_hole roundrect (at 0 0) (size 1 1.3) (drill 0.8 (offset 0 -0.1)) (layers *.Cu *.Mask)(roundrect_rratio 0.25)
(net 4 "Net-(Q2-PadG)"))
)
(module custom:edge_conn_1mm (layer F.Cu) (tedit 581E38A6) (tstamp 5823F00D)
(at 25.301 25.754)
(path /581E3DD7)
(fp_text reference TP3 (at 0 0.5) (layer F.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(fp_text value ESC_2 (at 0 -0.5) (layer F.Fab) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(pad 1 thru_hole roundrect (at 0 0) (size 1 1.3) (drill 0.8 (offset 0 -0.1)) (layers *.Cu *.Mask)(roundrect_rratio 0.25)
(net 6 "Net-(Q3-PadG)"))
)
(module custom:edge_conn_1mm (layer F.Cu) (tedit 581E38A6) (tstamp 5823F012)
(at 26.801 25.754)
(path /581E42E4)
(fp_text reference TP4 (at 0 0.5) (layer F.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(fp_text value ESC_3 (at 0 -0.5) (layer F.Fab) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(pad 1 thru_hole roundrect (at 0 0) (size 1 1.3) (drill 0.8 (offset 0 -0.1)) (layers *.Cu *.Mask)(roundrect_rratio 0.25)
(net 9 "Net-(Q4-PadG)"))
)
(module custom:edge_conn_1mm (layer F.Cu) (tedit 581E38A6) (tstamp 581E33CC)
(at 35 23.4 90)
(path /581E32A8)
(fp_text reference TP11 (at 0 0.5 90) (layer F.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(fp_text value GND (at 0 -0.5 90) (layer F.Fab) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(pad 1 thru_hole roundrect (at 0 0 90) (size 1 1.3) (drill 0.8 (offset 0 -0.1)) (layers *.Cu *.Mask)(roundrect_rratio 0.25)
(net 1 GND))
)
(module Capacitors_SMD:C_0805 (layer B.Cu) (tedit 5878E414) (tstamp 5823EF5E)
(at 34.2519 21.9202 270)
(descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0805")
(path /581E2844)
(attr smd)
(fp_text reference C2 (at -0.8382 -0.2159) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value 47u (at -0.0508 -0.2413 270) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))
(fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))
(fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.15))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.15))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.15))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.15))
(pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 10 "Net-(C2-Pad1)"))
(model Capacitors_SMD.3dshapes/C_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0805 (layer B.Cu) (tedit 5878E44B) (tstamp 5823EF7E)
(at 31.3055 25.6667)
(descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0805")
(path /581E2B53)
(attr smd)
(fp_text reference C4 (at -0.0381 -0.0127) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value 47u (at -0.0127 0.0127) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))
(fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))
(fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.15))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.15))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.15))
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.15))
(pad 2 smd rect (at 1 0) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -1 0) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 10 "Net-(C2-Pad1)"))
(model Capacitors_SMD.3dshapes/C_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Capacitors_SMD:C_0805 (layer B.Cu) (tedit 5878E416) (tstamp 5823EF8E)
(at 33.401 21.971 270)
(descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0805")
(path /581E2BAA)
(attr smd)
(fp_text reference C5 (at -0.889 0.127) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value 47u (at -0.127 0.127 270) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.15))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.15))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.15))
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.15))
(fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))
(fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 10 "Net-(C2-Pad1)"))
(pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model Capacitors_SMD.3dshapes/C_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module custom:SI2302DS_SOT-23 (layer B.Cu) (tedit 5878E42C) (tstamp 5823EF9E)
(at 24.6634 23.3934 90)
(descr "SOT-23, Standard")
(tags SOT-23)
(path /581E261A)
(attr smd)
(fp_text reference Q1 (at 1.0922 0.1778 180) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value FET_N (at -0.0508 0.0254 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start 1.49982 0.65024) (end 1.49982 -0.0508) (layer B.SilkS) (width 0.15))
(fp_line (start 1.29916 0.65024) (end 1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.49982 0.65024) (end -1.2509 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.49982 -0.0508) (end -1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start 1.29916 0.65024) (end 1.2509 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.65 -1.6) (end -1.65 1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 -1.6) (end -1.65 -1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 1.6) (end 1.65 -1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 1.6) (end 1.65 1.6) (layer B.CrtYd) (width 0.05))
(pad D smd rect (at 0 0.99822 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 2 "Net-(Q1-PadD)"))
(pad S smd rect (at 0.95 -1.00076 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad G smd rect (at -0.95 -1.00076 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 3 "Net-(Q1-PadG)"))
(model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module custom:SI2302DS_SOT-23 (layer B.Cu) (tedit 5878E446) (tstamp 5823EFAE)
(at 31.0642 23.3934 90)
(descr "SOT-23, Standard")
(tags SOT-23)
(path /581E40E6)
(attr smd)
(fp_text reference Q2 (at 1.0668 0.2286 180) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value FET_N (at 0 0 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -1.65 1.6) (end 1.65 1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 1.6) (end 1.65 -1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 -1.6) (end -1.65 -1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 -1.6) (end -1.65 1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.29916 0.65024) (end 1.2509 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.49982 -0.0508) (end -1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.49982 0.65024) (end -1.2509 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start 1.29916 0.65024) (end 1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start 1.49982 0.65024) (end 1.49982 -0.0508) (layer B.SilkS) (width 0.15))
(pad G smd rect (at -0.95 -1.00076 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 4 "Net-(Q2-PadG)"))
(pad S smd rect (at 0.95 -1.00076 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad D smd rect (at 0 0.99822 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 5 "Net-(Q2-PadD)"))
(model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module custom:SI2302DS_SOT-23 (layer B.Cu) (tedit 5878E41F) (tstamp 5823EFBE)
(at 28.6512 20.1168 270)
(descr "SOT-23, Standard")
(tags SOT-23)
(path /581E3DD1)
(attr smd)
(fp_text reference Q3 (at -1.0922 0.1778) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value FET_N (at -0.0762 -0.1016 270) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -1.65 1.6) (end 1.65 1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 1.6) (end 1.65 -1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 -1.6) (end -1.65 -1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 -1.6) (end -1.65 1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.29916 0.65024) (end 1.2509 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.49982 -0.0508) (end -1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.49982 0.65024) (end -1.2509 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start 1.29916 0.65024) (end 1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start 1.49982 0.65024) (end 1.49982 -0.0508) (layer B.SilkS) (width 0.15))
(pad G smd rect (at -0.95 -1.00076 270) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(Q3-PadG)"))
(pad S smd rect (at 0.95 -1.00076 270) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad D smd rect (at 0 0.99822 270) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 7 "Net-(Q3-PadD)"))
(model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module custom:SI2302DS_SOT-23 (layer B.Cu) (tedit 5878E43D) (tstamp 5823EFCE)
(at 27.8638 23.3934 90)
(descr "SOT-23, Standard")
(tags SOT-23)
(path /581E42DE)
(attr smd)
(fp_text reference Q4 (at 1.143 0.2032 180) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value FET_N (at 0.0254 0 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start 1.49982 0.65024) (end 1.49982 -0.0508) (layer B.SilkS) (width 0.15))
(fp_line (start 1.29916 0.65024) (end 1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.49982 0.65024) (end -1.2509 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.49982 -0.0508) (end -1.49982 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start 1.29916 0.65024) (end 1.2509 0.65024) (layer B.SilkS) (width 0.15))
(fp_line (start -1.65 -1.6) (end -1.65 1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 -1.6) (end -1.65 -1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.65 1.6) (end 1.65 -1.6) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.65 1.6) (end 1.65 1.6) (layer B.CrtYd) (width 0.05))
(pad D smd rect (at 0 0.99822 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 8 "Net-(Q4-PadD)"))
(pad S smd rect (at 0.95 -1.00076 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad G smd rect (at -0.95 -1.00076 90) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
(net 9 "Net-(Q4-PadG)"))
(model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0402 (layer B.Cu) (tedit 5878E430) (tstamp 5823EFDA)
(at 23.5585 23.3807 90)
(descr "Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0402")
(path /581E2DDE)
(attr smd)
(fp_text reference R1 (at -0.0635 -0.0127 180) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value 10k (at -0.1143 0.0381 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))
(fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 "Net-(Q1-PadG)"))
(pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model Resistors_SMD.3dshapes/R_0402.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0402 (layer B.Cu) (tedit 5878E442) (tstamp 5823EFE6)
(at 29.9593 23.3934 90)
(descr "Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0402")
(path /581E40F2)
(attr smd)
(fp_text reference R2 (at -0.0254 -0.0127 180) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value 10k (at -0.0762 0.0381 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))
(fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))
(fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))
(pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)
(net 4 "Net-(Q2-PadG)"))
(model Resistors_SMD.3dshapes/R_0402.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0402 (layer B.Cu) (tedit 5878E456) (tstamp 5823EFF2)
(at 29.7434 20.1168 270)
(descr "Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0402")
(path /581E3DDD)
(attr smd)
(fp_text reference R3 (at -0.0254 0) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value 10k (at -0.1016 -0.0762 270) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))
(fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))
(fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))
(pad 2 smd rect (at 0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 1 smd rect (at -0.45 0 270) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)
(net 6 "Net-(Q3-PadG)"))
(model Resistors_SMD.3dshapes/R_0402.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module custom:TP_1x1 (layer B.Cu) (tedit 581DB7CE) (tstamp 5823F017)
(at 25.5524 22.6314)
(path /581E2FD8)
(fp_text reference TP5 (at -0.1 3.2) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value M-_0 (at 0.1 5) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(pad 1 smd rect (at 0.1 -0.3) (size 1 1) (layers B.Cu B.Mask)
(net 2 "Net-(Q1-PadD)"))
)
(module custom:TP_1x1 (layer B.Cu) (tedit 581DB7CE) (tstamp 5823F01C)
(at 31.9786 22.606)
(path /581E40FE)
(fp_text reference TP6 (at -0.1 3.2) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value M-_1 (at 0.1 5) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(pad 1 smd rect (at 0.1 -0.3) (size 1 1) (layers B.Cu B.Mask)
(net 5 "Net-(Q2-PadD)"))
)
(module custom:TP_1x1 (layer B.Cu) (tedit 581DB7CE) (tstamp 5823F021)
(at 27.5082 21.463)
(path /581E3DE9)
(fp_text reference TP7 (at -0.1 3.2) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value M-_2 (at 0.1 5) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(pad 1 smd rect (at 0.1 -0.3) (size 1 1) (layers B.Cu B.Mask)
(net 7 "Net-(Q3-PadD)"))
)
(module custom:TP_1x1 (layer B.Cu) (tedit 581DB7CE) (tstamp 5823F026)
(at 28.7782 22.6314)
(path /581E42F6)
(fp_text reference TP8 (at -0.1 3.2) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value M-_3 (at 0.1 5) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(pad 1 smd rect (at 0.1 -0.3) (size 1 1) (layers B.Cu B.Mask)
(net 8 "Net-(Q4-PadD)"))
)
(module custom:PAD_2x3 (layer B.Cu) (tedit 581DB87C) (tstamp 5823F02B)
(at 33.2994 19.3548 90)
(path /581E2C9C)
(fp_text reference TP9 (at 0 -0.5 90) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value VBAT (at 0 0.5) (layer B.Fab) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(pad 1 smd roundrect (at 0 0 90) (size 2 3) (layers B.Cu B.Mask)(roundrect_rratio 0.25)
(net 10 "Net-(C2-Pad1)"))
)
(module custom:PAD_2x3 (layer B.Cu) (tedit 581DB87C) (tstamp 5823F030)
(at 33.7566 24.892 180)
(path /581E2D0E)
(fp_text reference TP10 (at 0 -0.5 180) (layer B.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value GND (at 0 0.5 90) (layer B.Fab) hide
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(pad 1 smd roundrect (at 0 0 180) (size 2 3) (layers B.Cu B.Mask)(roundrect_rratio 0.25)
(net 1 GND))
)
(module Capacitors_SMD:C_0805 (layer B.Cu) (tedit 5878E44F) (tstamp 581EBF84)
(at 31.0642 20.0406 270)
(descr "Capacitor SMD 0805, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0805")
(path /581E2AA7)
(attr smd)
(fp_text reference C3 (at -0.3556 -0.0254) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value 47u (at 0.1016 0.0762 270) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -1 -0.625) (end -1 0.625) (layer B.Fab) (width 0.15))
(fp_line (start 1 -0.625) (end -1 -0.625) (layer B.Fab) (width 0.15))
(fp_line (start 1 0.625) (end 1 -0.625) (layer B.Fab) (width 0.15))
(fp_line (start -1 0.625) (end 1 0.625) (layer B.Fab) (width 0.15))
(fp_line (start -1.8 1) (end 1.8 1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 -1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start -1.8 1) (end -1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start 1.8 1) (end 1.8 -1) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.5 0.85) (end -0.5 0.85) (layer B.SilkS) (width 0.15))
(fp_line (start -0.5 -0.85) (end 0.5 -0.85) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 10 "Net-(C2-Pad1)"))
(pad 2 smd rect (at 1 0 270) (size 1 1.25) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model Capacitors_SMD.3dshapes/C_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistors_SMD:R_0402 (layer B.Cu) (tedit 5878E436) (tstamp 581EBF90)
(at 26.7589 23.3934 90)
(descr "Resistor SMD 0402, reflow soldering, Vishay (see dcrcw.pdf)")
(tags "resistor 0402")
(path /581E42EA)
(attr smd)
(fp_text reference R4 (at -0.0508 0.0127 180) (layer B.SilkS)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_text value 10k (at -0.0508 -0.0127 90) (layer B.Fab)
(effects (font (size 0.4 0.4) (thickness 0.125)) (justify mirror))
)
(fp_line (start -0.95 0.65) (end 0.95 0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 -0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start -0.95 0.65) (end -0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.95 0.65) (end 0.95 -0.65) (layer B.CrtYd) (width 0.05))
(fp_line (start 0.25 0.525) (end -0.25 0.525) (layer B.SilkS) (width 0.15))
(fp_line (start -0.25 -0.525) (end 0.25 -0.525) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)
(net 9 "Net-(Q4-PadG)"))
(pad 2 smd rect (at 0.45 0 90) (size 0.4 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(model Resistors_SMD.3dshapes/R_0402.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module custom:edge_conn_1mm (layer F.Cu) (tedit 581E38A6) (tstamp 581EC31C)
(at 28.0924 18.1864 180)
(path /581EC38B)
(fp_text reference TP12 (at 0 0.5 180) (layer F.SilkS) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(fp_text value GND (at 0 -0.5 180) (layer F.Fab) hide
(effects (font (size 0.4 0.4) (thickness 0.125)))
)
(pad 1 thru_hole roundrect (at 0 0 180) (size 1 1.3) (drill 0.8 (offset 0 -0.1)) (layers *.Cu *.Mask)(roundrect_rratio 0.25)
(net 1 GND))
)
(gr_text "VMOTOR -" (at 36.449 24.9428) (layer Eco2.User) (tstamp 5878E5F5)
(effects (font (size 1 1) (thickness 0.25)) (justify right mirror))
)
(gr_text "VMOTOR +" (at 36.2458 19.1516) (layer Eco2.User) (tstamp 5878E5EB)
(effects (font (size 1 1) (thickness 0.25)) (justify right mirror))
)
(gr_text "+ MOTOR 1" (at 21.7678 18.0848) (layer Eco2.User) (tstamp 5878E5E1)
(effects (font (size 1 1) (thickness 0.25)) (justify left mirror))
)
(gr_text "+ MOTOR 3" (at 21.7424 19.6596) (layer Eco2.User) (tstamp 5878E5DF)
(effects (font (size 1 1) (thickness 0.25)) (justify left mirror))
)
(gr_text "+ MOTOR 2" (at 21.7678 21.0312) (layer Eco2.User) (tstamp 5878E5DD)
(effects (font (size 1 1) (thickness 0.25)) (justify left mirror))
)
(gr_text "+ MOTOR 4" (at 21.7678 22.606) (layer Eco2.User)
(effects (font (size 1 1) (thickness 0.25)) (justify left mirror))
)
(gr_line (start 34.0614 19.1516) (end 36.2458 19.1516) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 34.5948 24.9428) (end 36.449 24.9428) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 24.7904 22.606) (end 21.7932 22.606) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 25.0952 22.3012) (end 24.7904 22.606) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 26.4668 18.0848) (end 21.7678 18.0848) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 30.734 22.352) (end 26.4668 18.0848) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 31.4198 22.352) (end 30.734 22.352) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 25.7556 21.0312) (end 21.7678 21.0312) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 27.0764 22.352) (end 25.7556 21.0312) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 28.2448 22.352) (end 27.0764 22.352) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 25.8826 19.6596) (end 21.7424 19.6596) (angle 90) (layer Eco2.User) (width 0.2))
(gr_line (start 27.0764 20.8534) (end 25.8826 19.6596) (angle 90) (layer Eco2.User) (width 0.2))
(gr_circle (center 33.782 24.9682) (end 34.4932 24.638) (layer Eco2.User) (width 0.2))
(gr_circle (center 33.3248 19.2532) (end 34.0106 18.9484) (layer Eco2.User) (width 0.2))
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View File

@@ -0,0 +1,61 @@
update=Sat 05 Nov 2016 09:18:00 PM CET
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves
LibName30=../kicad_misc/custom

View File

@@ -0,0 +1,471 @@
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:custom
EELAYER 26 0
EELAYER END
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F 3 "" H 1950 1400 60 0000 C CNN
1 1950 1400
1 0 0 -1
$EndComp
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F 1 "47u" H 4890 1612 40 0000 L CNN
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F 3 "" H 4775 1650 60 0000 C CNN
1 4775 1650
1 0 0 -1
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F 3 "" H 5125 1650 60 0000 C CNN
1 5125 1650
1 0 0 -1
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F 1 "47u" H 5590 1612 40 0000 L CNN
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F 3 "" H 5475 1650 60 0000 C CNN
1 5475 1650
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F 3 "" H 5825 1650 60 0000 C CNN
1 5825 1650
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L TP TP9
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F 3 "" H 6800 1250 60 0000 C CNN
1 6800 1250
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L TP TP10
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L GND #PWR1
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F 1 "GND" H 1825 2155 30 0001 C CNN
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F 3 "" H 1825 2225 60 0001 C CNN
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1 0 0 -1
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Wire Wire Line
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Connection ~ 1525 1400
Wire Wire Line
2100 2075 2100 1750
Wire Wire Line
1525 2075 2100 2075
Wire Wire Line
1525 1900 1525 2075
Wire Wire Line
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Connection ~ 1825 2075
Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Connection ~ 5125 1250
Wire Wire Line
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Connection ~ 5125 2025
Wire Wire Line
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Connection ~ 5475 2025
Wire Wire Line
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Connection ~ 5475 1250
Wire Wire Line
5825 1250 5825 1500
Connection ~ 5825 1250
Wire Wire Line
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Connection ~ 5825 2025
Wire Wire Line
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Connection ~ 6300 2025
Wire Wire Line
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Wire Wire Line
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$Comp
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F 1 "FET_N" H 2227 4414 60 0000 L CNN
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F 3 "" H 2000 4475 60 0000 C CNN
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1 0 0 -1
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L TP TP3
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F 1 "ESC_2" H 1054 4323 60 0000 C CNN
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F 3 "" H 1175 4475 60 0000 C CNN
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L CUSTOM_R R3
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F 1 "10k" H 1646 4787 40 0000 L CNN
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F 3 "" H 1575 4825 30 0000 C CNN
1 1575 4825
1 0 0 -1
$EndComp
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L GND #PWR3
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P 1875 5300
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F 1 "GND" H 1875 5230 30 0001 C CNN
F 2 "" H 1875 5300 60 0001 C CNN
F 3 "" H 1875 5300 60 0001 C CNN
1 1875 5300
1 0 0 -1
$EndComp
$Comp
L TP TP7
U 1 1 581E3DE9
P 2825 4075
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F 1 "M-_2" H 2924 4075 60 0000 L CNN
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F 3 "" H 2825 4075 60 0000 C CNN
1 2825 4075
1 0 0 -1
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Wire Wire Line
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Wire Wire Line
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Connection ~ 1575 4475
Wire Wire Line
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Wire Wire Line
1575 5150 2150 5150
Wire Wire Line
1575 4975 1575 5150
Wire Wire Line
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Connection ~ 1875 5150
Wire Wire Line
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Wire Wire Line
2150 4075 2150 4125
$Comp
L FET_N Q2
U 1 1 581E40E6
P 1975 2850
F 0 "Q2" H 2202 2903 70 0000 L CNN
F 1 "FET_N" H 2202 2789 60 0000 L CNN
F 2 "custom:SI2302DS_SOT-23" H 1975 2850 60 0001 C CNN
F 3 "" H 1975 2850 60 0000 C CNN
1 1975 2850
1 0 0 -1
$EndComp
$Comp
L TP TP2
U 1 1 581E40EC
P 1150 2850
F 0 "TP2" H 1150 2700 60 0001 C CNN
F 1 "ESC_1" H 1029 2698 60 0000 C CNN
F 2 "custom:edge_conn_1mm" H 1150 2850 60 0001 C CNN
F 3 "" H 1150 2850 60 0000 C CNN
1 1150 2850
-1 0 0 1
$EndComp
$Comp
L CUSTOM_R R2
U 1 1 581E40F2
P 1550 3200
F 0 "R2" H 1621 3238 40 0000 L CNN
F 1 "10k" H 1621 3162 40 0000 L CNN
F 2 "Resistors_SMD:R_0402" V 1480 3200 30 0001 C CNN
F 3 "" H 1550 3200 30 0000 C CNN
1 1550 3200
1 0 0 -1
$EndComp
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L GND #PWR2
U 1 1 581E40F8
P 1850 3675
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F 1 "GND" H 1850 3605 30 0001 C CNN
F 2 "" H 1850 3675 60 0001 C CNN
F 3 "" H 1850 3675 60 0001 C CNN
1 1850 3675
1 0 0 -1
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$Comp
L TP TP6
U 1 1 581E40FE
P 2800 2450
F 0 "TP6" H 2800 2300 60 0001 C CNN
F 1 "M-_1" H 2899 2450 60 0000 L CNN
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F 3 "" H 2800 2450 60 0000 C CNN
1 2800 2450
1 0 0 -1
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Wire Wire Line
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Wire Wire Line
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Connection ~ 1550 2850
Wire Wire Line
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Wire Wire Line
1550 3525 2125 3525
Wire Wire Line
1550 3350 1550 3525
Wire Wire Line
1850 3675 1850 3525
Connection ~ 1850 3525
Wire Wire Line
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Wire Wire Line
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$Comp
L FET_N Q4
U 1 1 581E42DE
P 2075 6075
F 0 "Q4" H 2302 6128 70 0000 L CNN
F 1 "FET_N" H 2302 6014 60 0000 L CNN
F 2 "custom:SI2302DS_SOT-23" H 2075 6075 60 0001 C CNN
F 3 "" H 2075 6075 60 0000 C CNN
1 2075 6075
1 0 0 -1
$EndComp
$Comp
L TP TP4
U 1 1 581E42E4
P 1250 6075
F 0 "TP4" H 1250 5925 60 0001 C CNN
F 1 "ESC_3" H 1129 5923 60 0000 C CNN
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F 3 "" H 1250 6075 60 0000 C CNN
1 1250 6075
-1 0 0 1
$EndComp
$Comp
L CUSTOM_R R4
U 1 1 581E42EA
P 1650 6425
F 0 "R4" H 1721 6463 40 0000 L CNN
F 1 "10k" H 1721 6387 40 0000 L CNN
F 2 "Resistors_SMD:R_0402" V 1580 6425 30 0001 C CNN
F 3 "" H 1650 6425 30 0000 C CNN
1 1650 6425
1 0 0 -1
$EndComp
$Comp
L GND #PWR4
U 1 1 581E42F0
P 1950 6900
F 0 "#PWR4" H 1950 6900 30 0001 C CNN
F 1 "GND" H 1950 6830 30 0001 C CNN
F 2 "" H 1950 6900 60 0001 C CNN
F 3 "" H 1950 6900 60 0001 C CNN
1 1950 6900
1 0 0 -1
$EndComp
$Comp
L TP TP8
U 1 1 581E42F6
P 2900 5675
F 0 "TP8" H 2900 5525 60 0001 C CNN
F 1 "M-_3" H 2999 5675 60 0000 L CNN
F 2 "custom:TP_1x1" H 2900 5675 60 0001 C CNN
F 3 "" H 2900 5675 60 0000 C CNN
1 2900 5675
1 0 0 -1
$EndComp
Wire Wire Line
1550 6075 1775 6075
Wire Wire Line
1650 6075 1650 6275
Connection ~ 1650 6075
Wire Wire Line
2225 6750 2225 6425
Wire Wire Line
1650 6750 2225 6750
Wire Wire Line
1650 6575 1650 6750
Wire Wire Line
1950 6900 1950 6750
Connection ~ 1950 6750
Wire Wire Line
2600 5675 2225 5675
Wire Wire Line
2225 5675 2225 5725
$Comp
L TP TP11
U 1 1 581E32A8
P 6800 1800
F 0 "TP11" H 6800 1650 60 0001 C CNN
F 1 "GND" H 6899 1800 60 0000 L CNN
F 2 "custom:edge_conn_1mm" H 6800 1800 60 0001 C CNN
F 3 "" H 6800 1800 60 0000 C CNN
1 6800 1800
1 0 0 -1
$EndComp
Wire Wire Line
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$Comp
L TP TP12
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F 3 "" H 6800 1575 60 0000 C CNN
1 6800 1575
1 0 0 -1
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Wire Wire Line
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Connection ~ 6300 1800
Wire Wire Line
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$EndSCHEMATC