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*.bin
*.rst
*.user
*.asm
*.map
*.lk
*_preprocessed
*.mem
*.sym
*.rel
*.lst
# Object files
*.o
*.ko
*.obj
*.elf
# Precompiled Headers
*.gch
*.pch
# Libraries
*.lib
*.a
*.la
*.lo
# Shared objects (inc. Windows DLLs)
*.dll
*.so
*.so.*
*.dylib
# Executables
*.exe
*.out
*.app
*.i*86
*.x86_64
*.hex
# Debug files
*.dSYM/
*.su

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GNU GENERAL PUBLIC LICENSE
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The hypothetical commands `show w' and `show c' should show the appropriate
parts of the General Public License. Of course, your program's commands
might be different; for a GUI interface, you would use an "about box".
You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<http://www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<http://www.gnu.org/philosophy/why-not-lgpl.html>.

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BOOTLOADER_SIZE = 0x0C00 #use 3 pages for bootloader (1 page = 0x400)
FLASH_SIZE ?= 0x4000 #default to 16k flash
FLASH_PAGESIZE ?= 0x400 #1k page size for all targets
CC = sdcc
#set some flags depending on the target
CFLAGS = -DBOOTLOADER_SIZE=$(BOOTLOADER_SIZE)
CFLAGS += -DFLASH_SIZE=$(FLASH_SIZE)
CFLAGS += -DFLASH_PAGESIZE=$(FLASH_PAGESIZE)
#allow a custom config file to be passed
CONFIG_INCLUDE_DIR ?= default
CFLAGS += -I $(CONFIG_INCLUDE_DIR)
SDCC_FLAGS = --model-small --opt-code-speed -I /usr/share/sdcc/include $(CFLAGS)
LDFLAGS_FLASH = \
--out-fmt-ihx \
--code-loc 0x000 --code-size $(BOOTLOADER_SIZE) \
--xram-loc 0xf000 --xram-size 0x7FF \
--iram-size 0x100
AS = sdas8051
ASFLAGS = -plosgff
#programmer binary
CC_TOOL ?= cc-tool
ifdef DEBUG
CFLAGS += --debug
endif
SRC = main.c uart.c delay.c flash.c io.c
ADB=$(SRC:.c=.adb)
ASM=$(SRC:.c=.asm)
LNK=$(SRC:.c=.lnk)
LST=$(SRC:.c=.lst)
REL=$(SRC:.c=.rel)
RST=$(SRC:.c=.rst)
SYM=$(SRC:.c=.sym)
BL_TARGET=bootloader
PCDB=$(PROGS:.hex=.cdb)
PLNK=$(PROGS:.hex=.lnk)
PMAP=$(PROGS:.hex=.map)
PMEM=$(PROGS:.hex=.mem)
PAOM=$(PROGS:.hex=)
HEADER=$(wildcard *.h)
all: stylecheck $(BL_TARGET).hex
stylecheck: $(HEADER) $(SRC)
ifdef STYLECHECK_DISABLED
@echo "stylecheck disabled by parameter"
else
./stylecheck/cpplint.py \
--filter=-build/include,-build/storage_class,-readability/casting,-runtime/arrays \
--extensions="h,c" --linelength=100 $(HEADER) $(SRC) || true
endif
startup.rel : startup.s
@cpp -P $(CFLAGS) $< > $<_preprocessed
$(AS) $(ASFLAGS) $<_preprocessed
%.rel : %.c
$(CC) -c $(SDCC_FLAGS) -o$*.rel $<
$(BL_TARGET).hex: startup.rel $(REL) Makefile
$(CC) $(LDFLAGS_FLASH) $(SDCC_FLAGS) -o $(BL_TARGET).hex $(REL) startup.rel
$(BL_TARGET).bin: $(BL_TARGET).hex
@objcopy -Iihex -Obinary $(BL_TARGET).hex $(BL_TARGET).bin
clean:
@rm -f startup.rel
@rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM)
@rm -f $(BL_TARGET) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM)
@rm -f *_preprocessed
flash: $(BL_TARGET).hex
$(CC_TOOL) -f -e -w $(BL_TARGET).hex
.PHONY: stylecheck clean flash

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// ADD PREDEFINED MACROS HERE!

1
OpenSky_BL/OpenSky_BL.creator Normal file
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[General]

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config.h
led.h
main.c
main.h
portmacros.h
ivect.asm
uart.c
uart.h
delay.c
delay.h
device.h
flash.c
flash.h
cc25xx.h
dma.h
ivect.s

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.

7
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TEMPLATE = app
CONFIG += console
CONFIG -= app_bundle
CONFIG -= qt
SOURCES += main.c

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# OpenSky_BL
Bootloader code for the cc2510 to be used by the [OpenSky project](https://github.com/fishpepper/OpenSky).
The bootloader protocol used is the same as used for stm32f0/1/3, see [application note](www.st.com/resource/en/application_note/cd00264342.pdf).
The idea is to have a bootloader that can be used from within betaflight without the need for any further software. As betaflight supports the stm32 bootloader protocol, i choosed to implement it for the cc2510.
This allows to update/flash the receiver firmware without the need of a cc-tool isp programmer.
#Status
Bootloader upload/erase/go is working. Tested with betaflight configurator and stm32flash.
Note that Opensky needs to be compiled to with --code-loc 0x0c00 in order to be stored behind the bootloader. The bootloader code redirects all interrupts to the interrupt vector located at 0x0C00.
#TODO
Use a gpio hi/lo signal to decide wether to enter the bootloader or to jump to the app.
misc docs:
www.st.com/resource/en/application_note/cd00264342.pdf
http://www.ti.com/lit/an/swra222b/swra222b.pdf
http://www.ti.com/lit/gpn/cc2510
https://github.com/betaflight/betaflight-configurator/blob/master/js/protocols/stm32.js
https://sourceforge.net/p/stm32flash/code/ci/master/tree/stm32.c
http://www.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=swra371a

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BOOTLOADER_SIZE = 0x0C00 #use 3kb for bootloader
CC = sdcc
CFLAGS = -Wl-bHOME=$(BOOTLOADER_SIZE)
SDCC_FLAGS = --model-small --opt-code-speed -I /usr/share/sdcc/include $(CFLAGS)
LDFLAGS_FLASH = \
--out-fmt-ihx \
--code-loc 0x000 --code-size $(BOOTLOADER_SIZE) \
--xram-loc 0xf000 --xram-size 0x7FF \
--iram-size 0x100
AS = sdas8051
ASFLAGS = -plosgff
#programmer binary
CC_TOOL ?= cc-tool
ifdef DEBUG
CFLAGS += --debug
endif
SRC = main.c ../delay.c
ADB=$(SRC:.c=.adb)
ASM=$(SRC:.c=.asm)
LNK=$(SRC:.c=.lnk)
LST=$(SRC:.c=.lst)
REL=$(SRC:.c=.rel)
RST=$(SRC:.c=.rst)
SYM=$(SRC:.c=.sym)
TARGET=blinky
PCDB=$(PROGS:.hex=.cdb)
PLNK=$(PROGS:.hex=.lnk)
PMAP=$(PROGS:.hex=.map)
PMEM=$(PROGS:.hex=.mem)
PAOM=$(PROGS:.hex=)
HEADER=$(wildcard *.h)
all: $(TARGET).bin
%.rel : %.c
$(CC) -c $(SDCC_FLAGS) -o$*.rel $<
$(TARGET).hex: $(REL) Makefile
$(CC) $(LDFLAGS_FLASH) $(SDCC_FLAGS) -o $(TARGET).hex $(REL)
$(TARGET).bin: $(TARGET).hex
objcopy -Iihex -Obinary $(TARGET).hex $(TARGET).bin
clean:
rm -f $(ADB) $(ASM) $(LNK) $(LST) $(REL) $(RST) $(SYM)
rm -f $(TARGET) $(PCDB) $(PLNK) $(PMAP) $(PMEM) $(PAOM)
.PHONY: clean

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#include <stdint.h>
#include "../led.h"
#include "../delay.h"
void main(void) {
led_init();
while(1){
delay_ms(500);
led_green_toggle();
}
}

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef CC25XX_H_
#define CC25XX_H_
#include <stdint.h>
#include <cc2510fx.h>
#define PERCFG_U0CFG (1<<0)
#define PERCFG_U1CFG (1<<1)
#define PERCFG_T4CFG (1<<4)
#define PERCFG_T3CFG (1<<5)
#define PERCFG_T1CFG (1<<6)
#define IEN0_RFTXRXIE (1<<0)
#define IEN0_ADCIE (1<<1)
#define IEN0_URX0IE (1<<2)
#define IEN0_URX1IE (1<<3)
#define IEN0_ENCIE (1<<4)
#define IEN0_STIE (1<<5)
#define IEN0_EA (1<<7)
// bit 7 - unused
// bit 6 - unused
#define PICTL_P2IEN (1<<5)
#define PICTL_P0IENH (1<<4)
#define PICTL_P0IENL (1<<3)
#define PICTL_P2ICON (1<<2)
#define PICTL_P1ICON (1<<1)
#define PICTL_P0ICON (1<<0)
#define IEN1_P0IE (1<<5)
#define IEN1_T4IE (1<<4)
#define IEN1_T3IE (1<<3)
#define IEN1_T2IE (1<<2)
#define IEN1_T1IE (1<<1)
#define IEN1_DMAIE (1<<0)
#define IEN2_RFIE (1<<0)
#define IEN2_P2IE (1<<1)
#define IEN2_UTX0IE (1<<2)
#define IEN2_UTX1IE (1<<3)
#define IEN2_P1IE (1<<4)
#define IEN2_WDTIE (1<<5)
#define U0GCR_ORDER (1<<5)
#define U0GCR_CPHA (1<<6)
#define U0GCR_CPOL (1<<7)
#define U0CSR_TX_BYTE (1<<1)
#define U1GCR_ORDER (1<<5)
#define U1GCR_CPHA (1<<6)
#define U1GCR_CPOL (1<<7)
#define U1CSR_TX_BYTE (1<<1)
#define CLKCON_TICKSPD_001 (0b00001000)
#define CLKCON_TICKSPD_010 (0b00010000)
#define CLKCON_TICKSPD_011 (0b00011000)
#define CLKCON_TICKSPD_100 (0b00100000)
#define CLKCON_TICKSPD_101 (0b00101000)
#define CLKCON_TICKSPD_110 (0b00110000)
#define CLKCON_TICKSPD_111 (0b00111000)
#define CLKCON_OSC32K (1<<7)
#define ADCCON2_SREF_INT (0b00<<6)
#define ADCCON2_SREF_EXT (0b01<<6)
#define ADCCON2_SREF_AVDD (0b10<<6)
#define ADCCON2_SREF_EXTDIFF (0b11<<6)
#define ADCCON2_SDIV_7BIT (0b00<<4)
#define ADCCON2_SDIV_9BIT (0b01<<4)
#define ADCCON2_SDIV_10BIT (0b10<<4)
#define ADCCON2_SDIV_12BIT (0b11<<4)
#define ADCCON2_SCH_AIN0 (0b0000<<0)
#define ADCCON2_SCH_AIN1 (0b0001<<0)
#define ADCCON2_SCH_AIN2 (0b0010<<0)
#define ADCCON2_SCH_AIN3 (0b0011<<0)
#define ADCCON2_SCH_AIN4 (0b0100<<0)
#define ADCCON2_SCH_AIN5 (0b0101<<0)
#define ADCCON2_SCH_AIN6 (0b0110<<0)
#define ADCCON2_SCH_AIN7 (0b0111<<0)
#define ADCCON2_SCH_AIN0AIN1 (0b1000<<0)
#define ADCCON2_SCH_AIN2AIN3 (0b1001<<0)
#define ADCCON2_SCH_AIN4AIN5 (0b1010<<0)
#define ADCCON2_SCH_AIN6AIN7 (0b1011<<0)
#define ADCCON2_SCH_GND (0b1100<<0)
#define ADCCON2_SCH_POSVREF (0b1101<<0)
#define ADCCON2_SCH_TEMP (0b1110<<0)
#define ADCCON2_SCH_VDD3 (0b1111<<0)
#define ADCCON1_ST (1<<6)
#define ADCCON1_STSEL_FULL_SPEED (0b01<<4)
#define WDCTL_EN (1<<3)
#define WDCTL_MODE (1<<2)
#define WDCTL_INT (0b11)
#define WDCTL_INT_1S (0b00)
#define FCTL_BUSY (1<<7)
#define FCTL_SWBUSY (1<<6)
#define FCTL_WRITE (1<<1)
#define FCTL_ERASE (1<<0)
#endif // CC25XX_H_

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef DEFAULT_CONFIG_CONFIG_H_
#define DEFAULT_CONFIG_CONFIG_H_
// use defaults
#define BOOTLOADER_LED_GREEN_PORT P2
#define BOOTLOADER_LED_GREEN_PIN 4
#define BOOTLOADER_LED_RED_PORT P2
#define BOOTLOADER_LED_RED_PIN 3
#define BOOTLOADER_UART_NUM 1
#define BOOTLOADER_UART_PORT 0
#define BOOTLOADER_UART_INVERTED 0
#define BOOTLOADER_UART_BAUDRATE 57600
#define BOOTLOADER_UART_USE_PARITY 0
// use ISP interface clock pin as bootloader enable pin
// pull this low during startup to enter bootloader mode
#define BOOTLOADER_ENABLE_PORT P2
#define BOOTLOADER_ENABLE_PIN 2
#endif // DEFAULT_CONFIG_CONFIG_H_

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#include "delay.h"
// busy wait delay loop. not 100% accurate
void delay_ms(uint16_t ms) {
#define DELAY_MS_LOOP_A 86
#define DELAY_MS_LOOP_B 30
while (ms--) {
// this asm snippet gives us roughly 1ms delay:
__asm
mov r1, #DELAY_MS_LOOP_A
00000$: // delay_ms_loop_outer
dec r1
mov a, r1
jz 00002$
mov r2, #DELAY_MS_LOOP_B
00001$: // delay_ms_loop_inner
dec r2
mov a, r2
jz 00000$
sjmp 00001$
00002$: // delay_ms_done
__endasm;
}
}
// busy wait delay loop
// this is more or less accurate
void delay_us(uint16_t us) {
#define DELAY_US_LOOP 1
while (us--) {
__asm
nop
nop
nop
__endasm;
}
}

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef DELAY_H_
#define DELAY_H_
#include <stdint.h>
void delay_ms(uint16_t ms);
void delay_us(uint16_t us);
#endif // DELAY_H_

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef DEVICE_H_
#define DEVICE_H_
#include <cc2510fx.h>
#define CLOCKSOURCE_OSC_PD_BIT 0x04
#define CLOCKSOURCE_XOSC_STABLE_BIT 0x40
#define CLOCKSOURCE_XOSC_STABLE() (SLEEP & (CLOCKSOURCE_XOSC_STABLE_BIT))
#ifndef NOP
#define NOP() { __asm nop __endasm; }
#endif // NOP
#endif // DEVICE_H_

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef DMA_H_
#define DMA_H_
// HAL_DMA CONFIG
// see https://e2e.ti.com/support/wireless_connectivity/f/156/t/16922
typedef struct {
uint8_t SRCADDRH;
uint8_t SRCADDRL;
uint8_t DESTADDRH;
uint8_t DESTADDRL;
uint8_t LENH : 5;
uint8_t VLEN : 3;
uint8_t LENL : 8;
uint8_t TRIG : 5;
uint8_t TMODE : 2;
uint8_t WORDSIZE : 1;
uint8_t PRIORITY : 2;
uint8_t M8 : 1;
uint8_t IRQMASK : 1;
uint8_t DESTINC : 2;
uint8_t SRCINC : 2;
} dma_desc_t;
#define HI(a) (uint8_t) ((uint16_t)(a) >> 8 )
#define LO(a) (uint8_t) ((uint16_t)(a) & 0xFF )
#define SET_WORD(H, L, val) { (H) = HI(val); (L) = LO(val); }
#define DMA_PRI_LOW 0x00 // Low, CPU has priority
#define DMA_PRI_GUARANTEED 0x01 // Guaranteed, DMA at least every second try
#define DMA_PRI_HIGH 0x02 // High, DMA has priority
#define DMA_PRI_ABSOLUTE 0x03 // Highest, DMA has priority. Reserved for DMA port access.
#define DMA_PRI_LOW 0x00 // Low, CPU has priority
#define DMA_TRIG_NONE 0 // No trigger, setting DMAREQ.DMAREQx bit starts transfer
#define DMA_TRIG_PREV 1 // DMA channel is triggered by completion of previous channel
#define DMA_TRIG_T1_CH0 2 // Timer 1, compare, channel 0
#define DMA_TRIG_T1_CH1 3 // Timer 1, compare, channel 1
#define DMA_TRIG_T1_CH2 4 // Timer 1, compare, channel 2
#define DMA_TRIG_T2_COMP 5 // Timer 2, compare
#define DMA_TRIG_T2_OVFL 6 // Timer 2, overflow
#define DMA_TRIG_T3_CH0 7 // Timer 3, compare, channel 0
#define DMA_TRIG_T3_CH1 8 // Timer 3, compare, channel 1
#define DMA_TRIG_T4_CH0 9 // Timer 4, compare, channel 0
#define DMA_TRIG_T4_CH1 10 // Timer 4, compare, channel 1
#define DMA_TRIG_ST 11 // Sleep Timer compare
#define DMA_TRIG_IOC_0 12 // Port 0 I/O pin input transition
#define DMA_TRIG_IOC_1 13 // Port 1 I/O pin input transition
#define DMA_TRIG_URX0 14 // USART0 RX complete
#define DMA_TRIG_UTX0 15 // USART0 TX complete
#define DMA_TRIG_URX1 16 // USART1 RX complete
#define DMA_TRIG_UTX1 17 // USART1 TX complete
#define DMA_TRIG_FLASH 18 // Flash data write complete
#define DMA_TRIG_RADIO 19 // RF packet byte received/transmit
#define DMA_TRIG_ADC_CHALL 20 // ADC end of a conversion in a sequence, sample ready
#define DMA_TRIG_ADC_CH0 21 // ADC end of conversion channel 0 in sequence, sample ready
#define DMA_TRIG_ADC_CH1 22 // ADC end of conversion channel 1 in sequence, sample ready
#define DMA_TRIG_ADC_CH2 23 // ADC end of conversion channel 2 in sequence, sample ready
#define DMA_TRIG_ADC_CH3 24 // ADC end of conversion channel 3 in sequence, sample ready
#define DMA_TRIG_ADC_CH4 25 // ADC end of conversion channel 4 in sequence, sample ready
#define DMA_TRIG_ADC_CH5 26 // ADC end of conversion channel 5 in sequence, sample ready
#define DMA_TRIG_ADC_CH6 27 // ADC end of conversion channel 6 in sequence, sample ready
#define DMA_TRIG_ADC_CH7 28 // ADC end of conversion channel 7 in sequence, sample ready
#define DMA_TRIG_ENC_DW 29 // AES encryption processor requests download input data
#define DMA_TRIG_ENC_UP 30 // AES encryption processor requests upload output data
#define DMA_VLEN_USE_LEN 0x00 // Use LEN for transfer count
#define DMA_VLEN_FIRST_BYTE_P_1 0x01 // tx the nr of bytes specified by the 1st byte +1
#define DMA_VLEN_FIRST_BYTE 0x02 // tx the nr of bytes indicated by the 1st byte (itself incl.)
#define DMA_VLEN_FIRST_BYTE_P_2 0x03 // tx the nr of bytes specified by the 1st byte +2
#define DMA_VLEN_FIRST_BYTE_P_3 0x04 // tx the nr of bytes specified by the 1st byte +3
#define DMA_LEN_MAX 0xFF // The maximum length is always decided by the 1st byte
#define DMA_WORDSIZE_BYTE 0x00 // tx a byte at a time
#define DMA_WORDSIZE_WORD 0x01 // tx a 16-bit word at a time
#define DMA_TMODE_SINGLE 0x00 // tx a single byte/word after each DMA trigger
#define DMA_TMODE_BLOCK 0x01 // tx block of data (length len) after each DMA trigger
#define DMA_TMODE_SINGLE_REPEATED 0x02 // tx single byte/word (after len transfers, rearm DMA)
#define DMA_TMODE_BLOCK_REPEATED 0x03 // tx block of data (after len transfers, rearm DMA)
#define DMA_ARM_ABORT 0x80
#define DMA_ARM_CH0 (1<<0)
#define DMA_SRCINC_0 0x00 // Increment source pointer by 0 bytes/words after each transfer
#define DMA_SRCINC_1 0x01 // Increment source pointer by 1 bytes/words after each transfer
#define DMA_SRCINC_2 0x02 // Increment source pointer by 2 bytes/words after each transfer
#define DMA_SRCINC_M1 0x03 // Decrement source pointer by 1 bytes/words after each transfer
#define DMA_DESTINC_0 0x00 // Increment dest pointer by 0 bytes/words after each transfer
#define DMA_DESTINC_1 0x01 // Increment dest pointer by 1 bytes/words after each transfer
#define DMA_DESTINC_2 0x02 // Increment dest pointer by 2 bytes/words after each transfer
#define DMA_DESTINC_M1 0x03 // Decrement dest pointer by 1 bytes/words after each transfer
#define DMA_IRQMASK_DISABLE 0x00 // Disable interrupt generation
#define DMA_IRQMASK_ENABLE 0x01 // Enable interrupt generation upon DMA channel done
#define DMA_M8_USE_8_BITS 0x00 // Use all 8 bits for transfer count
#define DMA_M8_USE_7_BITS 0x01 // Use 7 LSB for transfer count
#define DMAIRQ_DMAIF0 (1<<0)
#define DMAIRQ_DMAIF1 (1<<1)
#define DMAIRQ_DMAIF2 (1<<2)
#define DMAIRQ_DMAIF3 (1<<3)
#define DMAIRQ_DMAIF4 (1<<4)
#endif // DMA_H_

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#include "flash.h"
#include "config.h"
#include "main.h"
#include "dma.h"
#include "device.h"
#include "cc25xx.h"
__xdata dma_desc_t flash_dma_config;
void flash_init(void) {
// cancel _ALL_ ongoing DMA transfers:
DMAARM = DMA_ARM_ABORT | 0x1F;
flash_dma_config.PRIORITY = DMA_PRI_HIGH; // high prio
flash_dma_config.M8 = DMA_M8_USE_8_BITS; // irrelevant since we use LEN
flash_dma_config.IRQMASK = DMA_IRQMASK_DISABLE; // disable ints from this ch
flash_dma_config.TRIG = DMA_TRIG_FLASH; // use dma data write complete trigger
flash_dma_config.TMODE = DMA_TMODE_SINGLE; // single mode, see datasheet
flash_dma_config.WORDSIZE = DMA_WORDSIZE_BYTE; // one byte
flash_dma_config.VLEN = DMA_VLEN_USE_LEN; // use LEN
flash_dma_config.SRCINC = DMA_SRCINC_1; // set srcinc to 1 byte
flash_dma_config.DESTINC = DMA_DESTINC_0; // fixed, always write to FWDATA
// set length of transfer in bytes
SET_WORD(flash_dma_config.LENH, flash_dma_config.LENL, 0);
// set src: address of data to be written
SET_WORD(flash_dma_config.SRCADDRH, flash_dma_config.SRCADDRL, 0);
// destination is flash controller data reg
SET_WORD(flash_dma_config.DESTADDRH, flash_dma_config.DESTADDRL, &X_FWDATA);
// save pointer to the DMA configuration struct into DMA-channel 0
// configuration registers
SET_WORD(DMA0CFGH, DMA0CFGL, flash_dma_config);
}
// NOTE: this will read len+1 bytes to buffer buf
void flash_read(uint16_t address, __xdata uint8_t *buf, uint16_t len) {
__xdata uint8_t * flash_ptr = (__xdata uint8_t *)address;
// copy len bytes to buf
while (len--) {
*buf++ = *flash_ptr++;
}
}
uint8_t flash_write_data(uint16_t address, __xdata uint8_t *buf, uint16_t len) {
// make sure not to overwrite bootloader:
if (address < BOOTLOADER_SIZE) {
return 0;
}
// make sure not to overwrite beyound valid flash region:
if ((address + len) >= FLASH_SIZE) {
return 0;
}
if (address & 1) {
// this should not happen, flash write needs an even start address
return 0;
}
if (len & 1) {
// this should also not happen, flash write has to write even number of bytes
return 0;
}
// cancel _ALL_ ongoing DMA transfers:
DMAARM = DMA_ARM_ABORT | 0x1F;
// set length of transfer in bytes
SET_WORD(flash_dma_config.LENH, flash_dma_config.LENL, len);
// set src: address of data to be written
SET_WORD(flash_dma_config.SRCADDRH, flash_dma_config.SRCADDRL, buf);
// destination is flash controller data reg
SET_WORD(flash_dma_config.DESTADDRH, flash_dma_config.DESTADDRL, &X_FWDATA);
// set up address:
SET_WORD(FADDRH, FADDRL, ((uint16_t)address)>>1);
// waiting for the flash controller to be ready
while (FCTL & FCTL_BUSY) {}
// configure flash controller for 26mhz clock
FWT = 0x2A; // (21 * 26) / (16);
// arm the DMA channel, so that a DMA trigger will initiate DMA writing
DMAARM = DMA_ARM_CH0;
NOP();
// trigger flash write. this generates a DMA trigger.
flash_trigger_write();
// wait for dma finish
while (!(DMAIRQ & DMAIRQ_DMAIF0)) {}
// wait until flash controller not busy
while (FCTL & (FCTL_BUSY | FCTL_SWBUSY)) {}
// by now, the transfer is completed, so the transfer count is reached.
// the DMA channel 0 interrupt flag is then set, so we clear it here.
DMAIRQ &= ~DMAIRQ_DMAIF0;
return 1;
}
uint8_t flash_erase_page(uint8_t page) {
if (page >= PAGECOUNT_FLASH) {
// maximum page exceeded, abort
return 0;
}
// deny deletion of bootloader
if (page < PAGECOUNT_BOOTLOADER) {
return 0;
}
// wait until flash controller is ready
while (FCTL & FCTL_BUSY) {}
// set up flash address FADDRH[5:1] set flash page
FADDRH = page << 1;
// configure flash controller for 26mhz clock
FWT = 0x2A;
// execute erase
FCTL |= FCTL_ERASE;
NOP();
return 1;
}
static void flash_trigger_write(void) {
// trigger flash write. this generates a DMA trigger
// this was moved to a separate function as sdcc does not
// optimize functions that include asm code (!)
__asm
.even // IMPORTANT: PLACE THIS ON A 2BYTE BOUNDARY!
ORL _FCTL, #0x02; // FCTL |= FCTL_WRITE
NOP
__endasm;
}

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef FLASH_H_
#define FLASH_H_
#include <stdint.h>
void flash_init(void);
void flash_read(uint16_t address, __xdata uint8_t *buf, uint16_t len);
uint8_t flash_write_data(uint16_t address, __xdata uint8_t *buf, uint16_t len);
uint8_t flash_erase_page(uint8_t page);
static void flash_trigger_write(void);
#if ((FLASH_SIZE) > 65535)
#error "ERROR: maximum supported flash size is 64k!"
#endif // ((DEVICE_FLASH_SIZE) > 65535)
#define PAGECOUNT_BOOTLOADER ((BOOTLOADER_SIZE) / (FLASH_PAGESIZE))
#define PAGECOUNT_FLASH ((FLASH_SIZE) / (FLASH_PAGESIZE))
#endif // FLASH_H_

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#include "io.h"
#include "config.h"
#include <cc2510fx.h>
#include "portmacros.h"
void io_init(void) {
// enable pullup on bootloader input
PORT2INP(BOOTLOADER_ENABLE_PORT) &= ~(1 << BOOTLOADER_ENABLE_PIN);
// set bootloader activation pin to input
PORT2DIR(BOOTLOADER_ENABLE_PORT) &= ~(1 << BOOTLOADER_ENABLE_PIN);
}
uint8_t io_bootloader_enabled(void) {
if (BOOTLOADER_ENABLE_PORT & (1 << BOOTLOADER_ENABLE_PIN)) {
// pin is high
return 0;
} else {
// pin is low
return 1;
}
}

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef IO_H_
#define IO_H_
#include <stdint.h>
void io_init(void);
uint8_t io_bootloader_enabled(void);
#endif // IO_H_.

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef LED_H_
#define LED_H_
#include <cc2510fx.h>
#include "portmacros.h"
#include "config.h"
#define BOOTLOADER_LED_GREEN_DIR PORT2DIR(BOOTLOADER_LED_GREEN_PORT)
#define BOOTLOADER_LED_RED_DIR PORT2DIR(BOOTLOADER_LED_RED_PORT)
#define BOOTLOADER_LED_RED_BIT PORT2BIT(BOOTLOADER_LED_RED_PORT, BOOTLOADER_LED_RED_PIN)
#define BOOTLOADER_LED_GREEN_BIT PORT2BIT(BOOTLOADER_LED_GREEN_PORT, BOOTLOADER_LED_GREEN_PIN)
#define led_green_init() { BOOTLOADER_LED_GREEN_DIR |= (1 << BOOTLOADER_LED_GREEN_PIN); \
led_green_off(); }
#define led_green_on() { BOOTLOADER_LED_GREEN_BIT = 1; }
#define led_green_off() { BOOTLOADER_LED_GREEN_BIT = 0; }
#define led_green_toggle() { BOOTLOADER_LED_GREEN_BIT = !BOOTLOADER_LED_GREEN_BIT; }
#define led_red_init() { BOOTLOADER_LED_RED_DIR |= (1 << BOOTLOADER_LED_RED_PIN); led_red_off(); }
#define led_red_on() { BOOTLOADER_LED_RED_BIT = 1; }
#define led_red_off() { BOOTLOADER_LED_RED_BIT = 0; }
#define led_red_toggle() { BOOTLOADER_LED_RED_BIT = !BOOTLOADER_LED_RED_BIT; }
// led init routines
#define led_init() { led_red_init(); led_green_init(); }
#endif // LED_H_

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#pragma noiv
#include <stdint.h>
#include "cc25xx.h"
#include "main.h"
#include "uart.h"
#include "led.h"
#include "delay.h"
#include "device.h"
#include "flash.h"
#include "io.h"
static void bootloader_init_clocks(void) {
// power up osc (?)
SLEEP &= ~CLOCKSOURCE_OSC_PD_BIT;
// wait for XOSC stable
while (!CLOCKSOURCE_XOSC_STABLE()) {}
NOP();
// start crystal osc as HS clocksource, OSC32 is int rc osc
CLKCON = 0x80;
// wait for selection to be active
while (!CLOCKSOURCE_XOSC_STABLE()) {}
NOP();
// power down the unused oscillator
SLEEP |= CLOCKSOURCE_OSC_PD_BIT;
}
static void bootloader_init(void) {
// show bootloader activity:
led_red_on();
led_green_on();
// set up clocks
bootloader_init_clocks();
// turn on cache pre-fetch mode
FCTL = 0x08;
// wait for vcc to stabilize
delay_ms(50);
}
static uint8_t bootloader_decode_address(uint16_t *address) {
uint8_t rx;
uint8_t checksum = 0;
// as we only accept 16bit addresses
// stm32 uses 0x0800xxyy as address for flash
// ignore the first two bytes
checksum ^= uart_getc();
checksum ^= uart_getc();
// high byte of 16bit
rx = uart_getc();
*address = rx;
checksum ^= rx;
// low byte of 16bit
rx = uart_getc();
*address = ((*address) << 8) | rx;
checksum ^= rx;
// read address checksum
rx = uart_getc();
// verify checksum
if (rx != checksum) {
// checksum invalid -> abort here
return 0;
}
// verify if this is within memory bounds:
if ((*address) > (FLASH_SIZE)) {
return 0;
}
// everything is fine
return 1;
}
static void bootloader_jump_to_app(void) {
// disable all interrupts
EA = 0;
IEN0 = 0;
IEN1 = 0;
IEN2 = 0;
// jump to main app. this will never return
__asm
ljmp #(BOOTLOADER_SIZE)
sjmp .
__endasm;
}
void bootloader_main(void) {
__xdata uint8_t buffer[256+2];
uint8_t state = 0;
uint8_t command = 0;
uint8_t rx = 0;
uint16_t address;
uint8_t *data_ptr = 0;
uint8_t checksum;
uint8_t len = 0;
uint16_t len16 = 0;
uint8_t i;
myfuncptr_t jump_helper;
io_init();
led_init();
// check if we have to enter the bootloader
// or jump to the application
// wait some time for the voltage level on i/o to
// stabilize
delay_ms(25);
if (!io_bootloader_enabled()) {
// bootloader enable pin pulled low
if (*((__xdata uint8_t*)(BOOTLOADER_SIZE)) != 0xFF) {
// there is valid flash content on this address
// so it is safe to jump to main app!
bootloader_jump_to_app();
}
}
bootloader_init();
uart_init();
flash_init();
led_green_on();
led_red_off();
// the bootloader enable pin was high or
// there was no valid code uploaded yet -> enter bootloader mode
while (1) {
// uart_putc_d(state);
// do main statemachine
switch (state) {
default:
case(0):
// fetch command byte
command = uart_getc();
if (command == BOOTLOADER_COMMAND_INIT) {
// init sequence, send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
} else {
// real command
state = 1;
}
break;
case(1):
// check command checksum (inverted)
rx = uart_getc();
// NOTE: ~x seems to be calculated in uint16_t !
if (rx == (command ^ 0xFF)) {
// fine, valid command -> decode
switch (command) {
// unknown or unsupported command
default:
// invalid command, abort
state = 0xFF;
break;
// all known commands
case(BOOTLOADER_COMMAND_GET):
case(BOOTLOADER_COMMAND_GET_VERSION):
case(BOOTLOADER_COMMAND_GET_ID):
case(BOOTLOADER_COMMAND_READ_MEMORY):
case(BOOTLOADER_COMMAND_GO):
case(BOOTLOADER_COMMAND_WRITE_MEMORY):
case(BOOTLOADER_COMMAND_ERASE):
// send ACK and continue with command handler
uart_putc(BOOTLOADER_RESPONSE_ACK);
state = 10 + command;
break;
}
} else {
// mismatch - this was either a comm error or we are
// in the middle of a command, retry with the current byte as cmd byte:
if (rx == BOOTLOADER_COMMAND_INIT) {
// init sequence, send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
state = 0;
} else {
// real command
command = rx;
}
}
break;
// send GET response
case(10 + BOOTLOADER_COMMAND_GET):
// number of command bytes that will follow
uart_putc(7);
// version
uart_putc(BOOTLOADER_VERSION);
// send supported commands
uart_putc(BOOTLOADER_COMMAND_GET);
uart_putc(BOOTLOADER_COMMAND_GET_VERSION);
uart_putc(BOOTLOADER_COMMAND_GET_ID);
uart_putc(BOOTLOADER_COMMAND_READ_MEMORY);
uart_putc(BOOTLOADER_COMMAND_GO);
uart_putc(BOOTLOADER_COMMAND_WRITE_MEMORY);
uart_putc(BOOTLOADER_COMMAND_ERASE);
// send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
// wait for next command
state = 0;
break;
// send GET_ID response
case(10 + BOOTLOADER_COMMAND_GET_ID):
// number of response bytes to follow
uart_putc(1);
// send product id of an F1 chip with the same pagesize (1024)
uart_putc(BOOTLOADER_DEVICE_ID >> 8);
uart_putc(BOOTLOADER_DEVICE_ID & 0xFF);
// send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
// wait for next command
state = 0;
break;
// send GET_VERSION response
case (10 + BOOTLOADER_COMMAND_GET_VERSION):
// bootloader version
uart_putc(BOOTLOADER_VERSION);
// send option bytes
uart_putc(0x00);
uart_putc(0x00);
// send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
// wait for next command
state = 0;
break;
// send READ_MEMORY response
case(10 + BOOTLOADER_COMMAND_READ_MEMORY):
if (!bootloader_decode_address(&address)) {
// abort now
state = 0xFF;
break;
}
// addresss is valid, send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
// fetch data
len = uart_getc();
checksum = uart_getc();
// verify checksum
if (len != (checksum ^ 0xFF)) {
// checksum invalid -> abort here
state = 0xFF;
break;
}
// checksum test passed, send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
// fetch flash content (len+1 bytes!)
flash_read(address, buffer, ((uint16_t) len) + 1);
// send len+1 bytes
data_ptr = &buffer[0];
uart_putc(*data_ptr++);
while (len--) {
uart_putc(*data_ptr++);
}
// wait for next command
state = 0;
break;
// send GO response
case(10 + BOOTLOADER_COMMAND_GO):
if (!bootloader_decode_address(&address)) {
// abort now
state = 0xFF;
break;
}
// addresss is valid, send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
// now jump to user application given by address
// disable all interrupts
EA = 0;
IEN0 = 0;
IEN1 = 0;
IEN2 = 0;
jump_helper = (myfuncptr_t) address;
jump_helper();
// wait for next command
state = 0;
break;
// send WRITE_MEMORY response
case(10 + BOOTLOADER_COMMAND_WRITE_MEMORY):
if (!bootloader_decode_address(&address)) {
// abort now
state = 0xFF;
break;
}
// addresss is valid, send ack
uart_putc(BOOTLOADER_RESPONSE_ACK);
// fetch len
len = uart_getc();
checksum = len;
// place to store data
data_ptr = &buffer[0];
// we will have to write len+1 bytes
len16 = ((uint16_t) len) + 1;
// we can only start the write on even addresses
if (address & 1) {
// not an even address, add a dummy write of 0xFF to the data:
address--;
*data_ptr++ = 0xFF;
len16++;
}
// retrieve N+1 data bytes
rx = uart_getc();
*data_ptr++ = rx;
checksum ^= rx;
for (i=0; i < len; i++) {
rx = uart_getc();
*data_ptr++ = rx;
checksum ^= rx;
}
// verify checksum
rx = uart_getc();
if (checksum != rx) {
// checksum invalid -> abort here
state = 0xFF;
break;
}
// we have to write an even number of bytes as well
if (len16 & 1) {
// not even, fix it by appending a dumm write of 0xFF
*data_ptr++ = 0xFF;
len16++;
}
// checksum ok - store data
if (!flash_write_data(address, buffer, len16)) {
// write failed
state = 0xFF;
break;
}
// done
uart_putc(BOOTLOADER_RESPONSE_ACK);
// wait for next command
state = 0;
break;
// send ERASE response
case(10 + BOOTLOADER_COMMAND_ERASE):
// get number of pages to be erased
len = uart_getc();
checksum = len;
if (len == 0xFF) {
// special case, full flash erase
if (uart_getc() == 0x00) {
// valid command, mark all pages to be erased
len = 0;
data_ptr = &buffer[0];
for (i = PAGECOUNT_BOOTLOADER; i < PAGECOUNT_FLASH; i++) {
buffer[len] = i;
len++;
}
} else {
// checksum error, abort
state = 0xFF;
break;
}
} else {
// fetch len+1 pages to be erased
data_ptr = &buffer[0];
rx = uart_getc();
*data_ptr++ = rx;
checksum ^= rx;
for (i = 0; i < len; i++) {
rx = uart_getc();
*data_ptr++ = rx;
checksum ^= rx;
}
// fetch checksum
rx = uart_getc();
if (rx != checksum) {
// checksum mismatch, abort
state = 0xFF;
break;
}
}
// fine, the len+1 pages to be erased are now in buffer[]
// execute the erase of len+1 pages
data_ptr = &buffer[0];
if (!flash_erase_page(*data_ptr++)) { state = 0xFF; break;}
while (len--) {
if (!flash_erase_page(*data_ptr++)) { state = 0xFF; break;}
}
// execute suceeded!
uart_putc(BOOTLOADER_RESPONSE_ACK);
// wait for next command
state = 0;
break;
// ABORT STATE - send nack and goto idle
case(0xFF):
uart_putc(BOOTLOADER_RESPONSE_NACK);
state = 0;
break;
}
}
}

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef MAIN_H_
#define MAIN_H_
#define min(a, b) (((a) < (b)) ? (a) : (b))
#define max(a, b) (((a) > (b)) ? (a) : (b))
#define BOOTLOADER_COMMAND_INIT 0x7F
#define BOOTLOADER_COMMAND_GET 0x00
#define BOOTLOADER_COMMAND_GET_VERSION 0x01
#define BOOTLOADER_COMMAND_GET_ID 0x02
#define BOOTLOADER_COMMAND_READ_MEMORY 0x11
#define BOOTLOADER_COMMAND_GO 0x21
#define BOOTLOADER_COMMAND_WRITE_MEMORY 0x31
#define BOOTLOADER_COMMAND_ERASE 0x43
#define BOOTLOADER_RESPONSE_ACK 0x79
#define BOOTLOADER_RESPONSE_NACK 0x1F
// version 1.0
#define BOOTLOADER_VERSION 0x10
#define BOOTLOADER_DEVICE_ID 0x0410
// #define BOOTLOADER_DEVICE_ID 0x0412
typedef void (*myfuncptr_t)(void);
#endif // MAIN_H_

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef PORTMACROS_H_
#define PORTMACROS_H_
// define some helpers
#define PORT2DIR_(X) X ## DIR
#define PORT2DIR(PORTNAME) PORT2DIR_(PORTNAME)
#define PORT2BIT_(X, N) X ## _ ## N
#define PORT2BIT(PORTNAME, PIN) PORT2BIT_(PORTNAME, PIN)
#define PORT2INP_(X) X ## INP
#define PORT2INP(PORTNAME) PORT2INP_(PORTNAME)
#endif // PORTMACROS_H_

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;
; Copyright 2016 fishpepper <AT> gmail.com
;
; This program is free software: you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation, either version 3 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
;
; author: fishpepper <AT> gmail.com
;main application will be moved to the following location:
APP_OFFSET=BOOTLOADER_SIZE
.globl __start__stack
;--------------------------------------------------------
; Stack segment in internal ram
;--------------------------------------------------------
.area SSEG (DATA)
__start__stack:
.ds 1
;--------------------------------------------------------
; custom interrupt vector -> redirect all isrs
;--------------------------------------------------------
.area VECTOR (ABS, CODE)
.globl __interrupt_vect
__interrupt_vect:
ljmp __sdcc_gsinit_startup
;0x0003: RF TX done / RX ready
ljmp #(0x0003 + APP_OFFSET)
.ds 5
;0x000B: ADC end of conversion
ljmp #(0x000B + APP_OFFSET)
.ds 5
;0x0013: USART0 RX complete
ljmp #(0x0013 + APP_OFFSET)
.ds 5
;0x001B: USART1 RX complete
ljmp #(0x001B + APP_OFFSET)
.ds 5
;0x0023: AES enc/dec complete
ljmp #(0x0023 + APP_OFFSET)
.ds 5
;0x002B: Sleep Timer compare
ljmp #(0x002B + APP_OFFSET)
.ds 5
;0x0033; Port 2 inputs
ljmp #(0x0033 + APP_OFFSET)
.ds 5
;0x003B: USART0 TXC
ljmp #(0x003B + APP_OFFSET)
.ds 5
;0x0043: DMA transfer complete
ljmp #(0x0043 + APP_OFFSET)
.ds 5
;0x004B: Timer 1 (16-bit) capture/Compare/overflow
ljmp #(0x004B + APP_OFFSET)
.ds 5
;0x0053: Timer 2 (MAC Timer) overflow
ljmp #(0x0053 + APP_OFFSET)
.ds 5
;0x005B: Timer 3 (8-bit) capture/compare/overflow
ljmp #(0x005B + APP_OFFSET)
.ds 5
;0x0063: Timer 4 (8-bit) capture/compare/overflow
ljmp #(0x0063 + APP_OFFSET)
.ds 5
;0x006B: Port 0 inputs
ljmp #(0x006B + APP_OFFSET)
.ds 5
;0x0073: USART1 TXC
ljmp #(0x0073 + APP_OFFSET)
.ds 5
;0x007B: Port 1 inputs
ljmp #(0x007B + APP_OFFSET)
.ds 5
;0x0083: RF general interrupts
ljmp #(0x0083 + APP_OFFSET)
.ds 5
;0x008B: Watchdog overflow in timer mode
ljmp #(0x008B + APP_OFFSET)
.globl __start__stack
.area GSINIT0 (CODE)
__sdcc_gsinit_startup:
mov sp,#__start__stack - 1
.area GSFINAL (CODE)
ljmp _bootloader_main
;return from main will lock up
sjmp .

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This is automated checker to make sure a C++ file follows Google's C++ style
guide (https://google.github.io/styleguide/cppguide.html). As it
heavily relies on regular expressions, cpplint.py won't catch all violations of
the style guide and will very occasionally report a false positive. There is a
list of things we currently don't handle very well at the top of cpplint.py,
and we welcome patches to improve it.
The linting tool takes a list of files as input. For full usage instructions,
please see the output of:
./cpplint.py --help
Unit tests are provided in cpplint_unittest.py. This file can safely be ignored
by end users who have downloaded this package and only want to run the lint
tool.
---
cpplint.py and its corresponding unit tests are Copyright (C) 2009 Google Inc.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
* Neither the name of Google Inc. nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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// A test header for cpplint_unittest.py.

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#include "uart.h"
#include "config.h"
#include "led.h"
#include "cc25xx.h"
#if (BOOTLOADER_UART_NUM == 0)
#define UxBAUD U0BAUD
#define UxGCR U0GCR
#define UxGCR_ORDER U0GCR_ORDER
#define UxCSR U0CSR
#define UxCSR_TX_BYTE U0CSR_TX_BYTE
#define UxUCR U0UCR
#define UxDBUF U0DBUF
#define URXxIF URX0IF
#define UTXxIF UTX0IF
#else
#define UxBAUD U1BAUD
#define UxGCR U1GCR
#define UxGCR_ORDER U1GCR_ORDER
#define UxCSR U1CSR
#define UxCSR_TX_BYTE U1CSR_TX_BYTE
#define UxUCR U1UCR
#define UxDBUF U1DBUF
#define URXxIF URX1IF
#define UTXxIF UTX1IF
#endif // BOOTLOADER_UART
void uart_init(void) {
__xdata union uart_config_t uart_config;
#if ((BOOTLOADER_UART_NUM) == 0) && ((BOOTLOADER_UART_PORT) == 0)
// -> USART0_P0
// use ALT1 -> Clear flag -> P0_3 = TX / P0_2 = RX
PERCFG &= ~(PERCFG_U0CFG);
// configure pins as peripheral:
P0SEL |= (1<<3) | (1<<2);
// make sure all P1 pins switch to normal GPIO
P1SEL &= ~(0x3C);
// make tx pin output:
P0DIR |= (1<<3);
#elif ((BOOTLOADER_UART_NUM) == 0) && ((BOOTLOADER_UART_PORT) == 1)
// -> USART0_P1
// use ALT2 -> Set flag -> P1_5 = TX / P1_4 = RX
PERCFG |= (PERCFG_U0CFG);
// configure pins as peripheral:
P1SEL |= (1<<5) | (1<<4);
// make sure all P0 pins switch to normal GPIO
P0SEL &= ~(0x3C);
// make tx pin output:
P1DIR |= (1<<5);
#elif ((BOOTLOADER_UART_NUM) == 1) && ((BOOTLOADER_UART_PORT) == 0)
// -> USART1_P0
// use ALT1 -> Clear flag -> P0_4 = TX / P0_5 = RX
PERCFG &= ~(PERCFG_U1CFG);
// USART1 has priority when USART0 is also enabled
P2DIR = (P2DIR & 0x3F) | 0b01000000;
// configure pins as peripheral:
P0SEL |= (1<<4) | (1<<5);
// make sure all P1 pins switch to normal GPIO
P1SEL &= ~(0xF0);
// make tx pin output:
P0DIR |= (1<<4);
#elif ((BOOTLOADER_UART_NUM) == 1) && ((BOOTLOADER_UART_PORT) == 1)
// -> USART1_P1
// use ALT2 -> set flag -> P1_6 = TX / P1_7 = RX
PERCFG |= (PERCFG_U1CFG);
// USART1 has priority when USART0 is also enabled
P2DIR = (P2DIR & 0x3F) | 0b01000000;
// configure pins as peripheral:
P1SEL |= (1<<6) | (1<<7);
// make sure all P0 pins switch to normal GPIO
P0SEL &= ~(0x3C);
// make tx pin output:
P1DIR |= (1<<6);
#else
#error "ERROR: UNSUPPORTED DEBUG UART"
#endif // BOOTLOADER_UART_*
// this assumes cpu runs from XOSC (26mhz) !
// set baudrate
UxBAUD = UART_BAUD_M;
UxGCR = (UxGCR & ~0x1F) | (UART_BAUD_E);
// set up config
#if BOOTLOADER_UART_INVERTED
// this is a really nice feature of the cc2510:
// we can invert the idle level of the usart
// by setting STOP to zero. by inverting
// the parity, the startbit, and the data
// we can effectively invert the usart in software :)
uart_config.bit.START = 1; // startbit level = low
uart_config.bit.STOP = 0; // stopbit level = high
uart_config.bit.D9 = 1; // UNEven parity
#else
// standard usart, non-inverted mode
uart_config.bit.START = 0; // startbit level = low
uart_config.bit.STOP = 1; // stopbit level = high
uart_config.bit.D9 = 0; // Even parity
#endif // BOOTLOADER_UART_INVERTED
#if BOOTLOADER_UART_USE_2STOPBITS
uart_config.bit.SPB = 1; // 2 stopbit
#else
uart_config.bit.SPB = 0; // 1 stopbit
#endif // BOOTLOADER_UART_USE_2STOPBITS
#if BOOTLOADER_UART_USE_PARITY
// use parity
uart_config.bit.PARITY = 1; // 1 = parity enabled, D9=0 -> even parity
uart_config.bit.BIT9 = 1; // 8+1 parity bit
#else
// no parity
uart_config.bit.PARITY = 0; // no parity
uart_config.bit.BIT9 = 0; // 8+0 parity bit
#endif // BOOTLOADER_USE_PARITY
uart_config.bit.FLOW = 0; // no hw flow control
uart_config.bit.ORDER = 0; // lsb first
// enable uart mode
UxCSR |= 0x80;
// store config to UxUCR register
UxUCR = uart_config.byte & (0x7F);
// store config to UxGCR: (msb/lsb)
if (uart_config.bit.ORDER) {
UxGCR |= UxGCR_ORDER;
} else {
UxGCR &= ~UxGCR_ORDER;
}
// enable receiver
UxCSR |= 0x40;
}
uint8_t uart_getc(void) {
uint8_t res = 0;
led_green_toggle();
// wait for RX
while (!URXxIF) {}
// fetch data
#if BOOTLOADER_UART_INVERTED
res = 0xFF ^ UxDBUF;
#else
res = UxDBUF;
#endif // BOOTLOADER_UART_INVERTED
// clear flag
URXxIF = 0;
return res;
}
void uart_putc(uint8_t c) {
UTXxIF = 0;
#if BOOTLOADER_UART_INVERTED
UxDBUF = 0xFF ^ c;
#else
UxDBUF = c;
#endif // BOOTLOADER_UART_INVERTED
led_red_toggle();
while (!UTXxIF) {}
UTXxIF = 0;
}

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/*
Copyright 2016 fishpepper <AT> gmail.com
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
author: fishpepper <AT> gmail.com
*/
#ifndef UART_H_
#define UART_H_
#include <stdint.h>
#include "config.h"
// for a 26MHz Crystal:
#define CC2510_BAUD_M_115200 34
#define CC2510_BAUD_E_115200 12
#define CC2510_BAUD_M_57600 34
#define CC2510_BAUD_E_57600 11
// best match for 100kbit/s = 99975.5859375 bit/s
// baudrate = (((256.0 + baud_m)*2.0**baud_e) / (2**28)) * 26000000.0
#define CC2510_BAUD_E_100000 11
#define CC2510_BAUD_M_100000 248
// set baudrate:
#if (BOOTLOADER_UART_BAUDRATE == 57600)
#define UART_BAUD_M CC2510_BAUD_M_57600
#define UART_BAUD_E CC2510_BAUD_E_57600
#elif (BOOTLOADER_UART_BAUDRATE == 115200)
#define UART_BAUD_M CC2510_BAUD_M_115200
#define UART_BAUD_E CC2510_BAUD_E_115200
#elif (BOOTLOADER_UART_BAUDRATE == 100000)
#define UART_BAUD_M CC2510_BAUD_M_100000
#define UART_BAUD_E CC2510_BAUD_E_100000
#else
#error INVALID BAUDRATE SELECTED ! BOOTLOADER_UART_BAUDRATE
#endif // BOOTLOADER_UART_BAUDRATE
void uart_init(void);
union uart_config_t{
uint8_t byte;
struct {
uint8_t START : 1; // start bit level
uint8_t STOP : 1; // stop bit level
uint8_t SPB : 1; // stop bits (0=1, 1=2)
uint8_t PARITY: 1; // parity (on/off)
uint8_t BIT9 : 1; // 9 bit mode
uint8_t D9 : 1; // 9th bit level or parity type
uint8_t FLOW : 1; // flow control
uint8_t ORDER : 1; // data bit order (LSB or MSB first)
} bit;
};
uint8_t uart_getc(void);
void uart_putc(uint8_t c);
#endif // UART_H_