Ajout FishPeper
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168
OpenSky/arch/stm32f1/hal_ppm.c
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168
OpenSky/arch/stm32f1/hal_ppm.c
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/*
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Copyright 2017 fishpepper <AT> gmail.com
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http:// www.gnu.org/licenses/>.
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author: fishpepper <AT> gmail.com
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*/
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#include "hal_ppm.h"
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#include "ppm.h"
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#include "wdt.h"
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#include "led.h"
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#include "stm32f10x_rcc.h"
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#include "stm32f10x_gpio.h"
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#include "stm32f10x_tim.h"
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#include "misc.h" // stm32 nvic stuff
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#ifndef SBUS_ENABLED
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void hal_ppm_init(void) {
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hal_ppm_init_rcc();
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hal_ppm_init_gpio();
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hal_ppm_init_timer();
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hal_ppm_init_nvic();
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}
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static void hal_ppm_init_rcc(void) {
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// PCLK = HCLK set in system init...
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// do not set it here...
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// timer clock enable */
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RCC_APBxPeriphClockCmd(PPM_TIMER_CLK_RCC, PPM_TIMER_CLK, ENABLE);
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// gpio clock
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RCC_APBxPeriphClockCmd(PPM_GPIO_CLK_RCC, PPM_GPIO_CLK, ENABLE);
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// afio clk
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
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}
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static void hal_ppm_init_gpio(void) {
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GPIO_InitTypeDef gpio_init;
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// activate AF for ppm gpio:
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gpio_init.GPIO_Pin = PPM_PIN;
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gpio_init.GPIO_Mode = GPIO_Mode_AF_PP;
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gpio_init.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(PPM_GPIO, &gpio_init);
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}
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static void hal_ppm_init_timer(void) {
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TIM_TimeBaseInitTypeDef tim_init;
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TIM_OCInitTypeDef tim_oc_init;
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TIM_TimeBaseStructInit(&tim_init);
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// time base configuration: count to 1000us (will be set properly lateron)
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tim_init.TIM_Period = HAL_PPM_US_TO_TICKCOUNT(1000);
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// compute the prescaler value, we want a 0.5us resolution (= count with 2mhz):
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tim_init.TIM_Prescaler = (uint16_t) (SystemCoreClock / 2000000) - 1;
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tim_init.TIM_ClockDivision = 0;
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tim_init.TIM_CounterMode = TIM_CounterMode_Up;
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// set time base. NOTE: this will immediately trigger an INT!
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TIM_TimeBaseInit(PPM_TIMER, &tim_init);
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// clear IT flag (caused by TimeBaseInit()):
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TIM_ClearITPendingBit(PPM_TIMER, TIM_IT_Update);
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// Output Compare Active Mode configuration:
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TIM_OCStructInit(&tim_oc_init);
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#ifdef PPM_INVERTED
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tim_oc_init.TIM_OCMode = TIM_OCMode_PWM2;
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#else
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tim_oc_init.TIM_OCMode = TIM_OCMode_PWM1;
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#endif // PPM_INVERTED
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tim_oc_init.TIM_OutputState = TIM_OutputState_Enable;
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tim_oc_init.TIM_Pulse = PPM_SYNC_PULS_LEN_TICKS;
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tim_oc_init.TIM_OCPolarity = TIM_OCPolarity_High;
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hal_ppm_init_ocx(PPM_TIMER_CH, PPM_TIMER, &tim_oc_init);
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// enable counter
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TIM_Cmd(PPM_TIMER, ENABLE);
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}
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static void hal_ppm_init_nvic(void) {
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NVIC_InitTypeDef nvic_init;
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// strange, somehow the Timer IT Flags seem to be already enabled?!
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TIM_ITConfig(PPM_TIMER, TIM_IT_Update, DISABLE);
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TIM_ITConfig(PPM_TIMER, TIM_IT_Break, DISABLE);
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TIM_ITConfig(PPM_TIMER, TIM_IT_CC1 | TIM_IT_CC2 | TIM_IT_CC3 | TIM_IT_CC4, DISABLE);
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TIM_ITConfig(PPM_TIMER, TIM_IT_Trigger, DISABLE);
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// enable timer interrupt
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nvic_init.NVIC_IRQChannel = PPM_TIMER_IRQn;
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nvic_init.NVIC_IRQChannelPreemptionPriority = NVIC_PRIO_PPM;
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nvic_init.NVIC_IRQChannelSubPriority = 0;
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nvic_init.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&nvic_init);
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// enable ONLY update interrupt
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TIM_ITConfig(PPM_TIMER, TIM_IT_Update, ENABLE);
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}
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void hal_ppm_failsafe_enter(void) {
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// set output to static value ZERO
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TIM_ITConfig(PPM_TIMER, TIM_IT_Update, DISABLE);
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// set output to static low or high level:
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GPIO_InitTypeDef gpio_init;
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gpio_init.GPIO_Pin = PPM_PIN;
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gpio_init.GPIO_Mode = GPIO_Mode_Out_PP;
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gpio_init.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_Init(PPM_GPIO, &gpio_init);
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#if PPM_INVERTED
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// clear on zero -> default is high
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PPM_GPIO->BSRR = (PPM_PIN);
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#else
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// set on zero -> default is low
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PPM_GPIO->BRR = (PPM_PIN);
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#endif // PPM_INVERTED
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}
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void hal_ppm_failsafe_exit(void) {
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// exit failsafe, back to pulse generation
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hal_ppm_init_gpio();
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// re-enable ppm output isr
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TIM_ITConfig(PPM_TIMER, TIM_IT_Update, ENABLE);
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}
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static void hal_ppm_init_ocx(uint8_t ch, TIM_TypeDef *TIMx, TIM_OCInitTypeDef *tim_oc_init) {
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switch (PPM_TIMER_CH) {
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default:
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break;
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case(TIM_Channel_4):
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TIM_OC4Init(TIMx, tim_oc_init);
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TIM_OC4PreloadConfig(TIMx, TIM_OCPreload_Disable);
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break;
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case(TIM_Channel_3):
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TIM_OC3Init(TIMx, tim_oc_init);
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TIM_OC3PreloadConfig(TIMx, TIM_OCPreload_Disable);
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break;
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case(TIM_Channel_2):
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TIM_OC2Init(TIMx, tim_oc_init);
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TIM_OC2PreloadConfig(TIMx, TIM_OCPreload_Disable);
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break;
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case(TIM_Channel_1):
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TIM_OC1Init(TIMx, tim_oc_init);
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TIM_OC1PreloadConfig(TIMx, TIM_OCPreload_Disable);
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break;
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}
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}
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#endif // SBUS_ENABLED
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