305 lines
7.0 KiB
C
305 lines
7.0 KiB
C
#include "sys_config.h"
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#include "typesdef.h"
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#ifdef CSKY_OS
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#include "csi_config.h"
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#include "soc.h"
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#include "csi_core.h"
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#include "csi_kernel.h"
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#endif
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#ifdef OHOS
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#include "los_task.h"
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#endif
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#include "txw81x/ticker.h"
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#include "osal/irq.h"
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#include "osal/string.h"
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#include "osal/semaphore.h"
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#include "osal/task.h"
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#include "osal/work.h"
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#include "devid.h"
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#include "lib/heap/sysheap.h"
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#include "lib/lmac/lmac.h"
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#include "lib/common/sysevt.h"
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#include "lib/common/common.h"
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#include "dev/xspi/hg_xspi_psram.h"
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#include "psram_cfg.h"
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#ifdef CONFIG_SLEEP
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#include "lib/common/dsleepdata.h"
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#endif
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extern int main(void);
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extern int dev_init(void);
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extern void device_init(void);
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extern void set_psram_status(uint8_t res);
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extern uint8_t get_psram_status();
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extern int32_t g_top_irqstack;
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extern uint32_t __heap_start;
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extern uint32_t __heap_end;
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extern uint32_t __psram_heap_start;
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extern uint32_t __psram_heap_end;
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extern struct os_workqueue main_wkq;
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extern uint32 *sysvar_mgr;
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extern uint8_t assert_holdup;
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const uint32 g_DEFAULT_SYS_CLK = DEFAULT_SYS_CLK;
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const uint32 g_SYS_CACHE_ENABLE = SYS_CACHE_ENABLE;
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uint32 srampool_start = 0;
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uint32 srampool_end = 0;
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uint32 psrampool_start = 0;
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uint32 psrampool_end = 0;
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uint32 __sp_save[3];
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#ifndef SYS_FACTORY_PARAM_SIZE
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#define SYS_FACTORY_PARAM_SIZE 4
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#endif
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const uint16_t __used sys_factory_param[SYS_FACTORY_PARAM_SIZE / 2] __at_section("SYS_PARAM") = {SYS_FACTORY_PARAM_SIZE};
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//为了不同工程,所以这里写一个空函数,即使没有save_boot_loader_addr也不会编译出错
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__init __weak void save_boot_loader_addr() {};
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__SYS_INIT void cache_open(void)
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{
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sysctrl_cache_en();
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csi_cache_reset_profile();
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csi_cache_set_range(0, (uint32_t) & (__Vectors), CACHE_CRCR_8M, 0x1);
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#if defined(PSRAM_HEAP)
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csi_cache_set_range(1, PSRAM_BASE, CACHE_CRCR_16M, 0x1);
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#endif
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csi_cache_enable_profile();
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csi_dcache_enable();
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}
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__SYS_INIT __weak void system_clock_init(void)
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{
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if (!sysctrl_cmu_sysclk_set(DEFAULT_SYS_CLK, 1)) {
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while (1);
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}
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}
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void irq_enable(uint32 irq)
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{
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NVIC_EnableIRQ(irq);
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}
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void irq_disable(uint32 irq)
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{
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NVIC_DisableIRQ(irq);
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}
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uint32 disable_irq(void)
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{
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return __disable_irq();
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}
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void enable_irq(uint32 flag)
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{
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if(!flag) __enable_irq();
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}
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int32 hg_qspi_flash_xip_mode(void *hw1, uint32 xip_en) {
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return RET_OK;
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}
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/**
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* @retval : wp_en_last
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*/
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int32 hg_qspi_flash_protect(void *hw1, uint32 wp_en) {
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int32 wp_en_last = 0;
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return wp_en_last;
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}
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/** @param
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* pack = 0x0C : P25Q16SH, DC = CR1[2]
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* 0x1C : GD25Q16E, DC = SR2[4]
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* 0xFF : auto detect for TWX817-824
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* @retval
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* RET_ERR or last hs status
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*/
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int32 hg_qspi_flash_hs_enable(void *hw1, uint32 pack) {
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int32 hs_en_last = 0;
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return hs_en_last;
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}
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__SYS_INIT void SystemInit(void)
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{
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srampool_start = (uint32)&__heap_start;
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srampool_end = (uint32)&__heap_end;
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psrampool_start = (uint32)&__psram_heap_start;
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psrampool_end = (uint32)&__psram_heap_end;
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extern uint32 g_intstackbase;
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*((int *)((uint32)&g_intstackbase)) = 0xDEADBEEF;
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__set_VBR((uint32_t) & (__Vectors));
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SYSCTRL_REG_OPT_INIT();
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#if SYS_CACHE_ENABLE
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cache_open();
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#endif
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sys_reset_detect();
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sys_reset_pending_clr();
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sysctrl_efuse_pwron_init();
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// if (sysctrl_get_softreset_pending()) {
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// sysctrl_clr_softreset_pending();
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// pmu_set_direct_run_pengding2();
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// } else {
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// pmu_clr_direct_run_pengding2();
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// }
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pmu_boot_direct_run_dis();
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SET_SKIP_PSRAM_SIGN(0);
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pmu_clr_deadcode_pending();
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mcu_watchdog_feed();
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mcu_watchdog_timeout_level(4);
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// sysctrl_err_resp_disable();
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sysctrl_cmu_init();
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#ifndef FPGA_SUPPORT
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system_clock_init();
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#endif
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void hg_xspi_sample_offset(uint32 ospi_base, int8 rx_offset, int8 tx_offset);
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hg_xspi_sample_offset((uint32)HG_OSPI_BASE, -2, 0);
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pmu_vdd_core_set(3);
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#if defined(CONFIG_SEPARATE_IRQ_SP) && !defined(CONFIG_KERNEL_NONE)
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/* 801 not supported */
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__set_Int_SP((uint32_t)&g_top_irqstack);
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__set_CHR(__get_CHR() | CHR_ISE_Msk);
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VIC->TSPR = 0xFF;
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#endif
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/* Clear active and pending IRQ */
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csi_vic_disable_all_irq();
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csi_vic_clear_all_pending_irq();
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csi_vic_clear_all_active();
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/* All peripheral interrupt priority is set to lowest */
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for (uint32 i = 0; i < IRQ_NUM; i++) {
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csi_vic_set_prio(i, 7);
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}
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#ifdef CONFIG_KERNEL_NONE
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__enable_excp_irq();
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#endif
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csi_coret_config(system_clock_get() / OS_SYSTICK_HZ, CORET_IRQn); //1ms
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#ifndef CONFIG_KERNEL_NONE
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csi_vic_enable_irq(CORET_IRQn);
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#endif
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request_irq(LVD_IRQn, lvd_irq_handler, 0);
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irq_enable(LVD_IRQn);
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#ifndef CONFIG_SLEEP
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sysctrl_gpio_funcmap_default();
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#else
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int32 is_dsleep_wakeup(void);
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if(!is_dsleep_wakeup()) sysctrl_gpio_funcmap_default();
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#endif
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pmu_set_deadcode_pending();
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mcu_watchdog_feed();
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mcu_watchdog_timeout_level(8);
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}
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#if MPOOL_ALLOC
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__init void malloc_init(void)
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{
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uint32 flags = 0;
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#ifdef MEM_TRACE
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flags |= SYSHEAP_FLAGS_MEM_LEAK_TRACE | SYSHEAP_FLAGS_MEM_OVERFLOW_CHECK;
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#endif
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sram_heap.name = "sram";
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sysheap_init(&sram_heap, (void *)SYS_HEAP_START, SYS_HEAP_SIZE, flags);
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}
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__init void malloc_psram_init(void)
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{
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#ifdef PSRAM_HEAP
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uint32 flags = SYSHEAP_FLAGS_MEM_ALIGN_16;
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#ifdef MEM_TRACE
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flags |= SYSHEAP_FLAGS_MEM_LEAK_TRACE | SYSHEAP_FLAGS_MEM_OVERFLOW_CHECK;
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#endif
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psram_heap.name = "psram";
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sysheap_init(&psram_heap, (void *)psrampool_start, psrampool_end - psrampool_start, flags);
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#endif
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}
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void ota_msg_show()
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{
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os_printf("[OTA_MSG] OTA_NUM:%d\tota_version:%d\trun_addr:%X\n",pmu_get_boot_code_pos(),get_boot_svn_version(),get_boot_loader_addr());
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}
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#endif
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__init void pre_main(void)
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{
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sdk_version = SDK_VERSION;
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svn_version = SVN_VERSION;
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app_version = APP_VERSION;
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assert_holdup = ASSERT_HOLDUP;
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save_boot_loader_addr();
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uint8_t res;
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if(NOW_PSRAM > PSRAM_DEF(E_PSRAM)) {
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//printf("now_psram:%d\t%d\n",NOW_PSRAM,PSRAM_DEF(E_PSRAM));
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res = psram_init(APS1604M_3SQR, (60*1000000),512);
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//外部psram初始化,所以需要配置对应的状态
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set_psram_status(res);
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} else {
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//is not ready?
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if(!get_psram_status()) {
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res = psram_auto_init();
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set_psram_status(res);
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}
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}
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#if MPOOL_ALLOC
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malloc_init();
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malloc_psram_init();
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#endif
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#ifdef CSKY_OS
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csi_kernel_init();
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#endif
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#ifdef OHOS
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LOS_KernelInit();
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#endif
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dev_init();
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device_init();
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#ifdef CONFIG_SLEEP
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sys_sleepcb_init();
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#endif
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#ifdef CONFIG_SLEEP
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sys_sleepdata_init();
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#endif
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sysctrl_rst_lmac_phy();
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sysctrl_efuse_validity_handle();
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ota_msg_show();
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VERSION_SHOW();
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module_version_show();
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sys_reset_show();
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os_workqueue_init(&main_wkq, "MAIN", OS_TASK_PRIORITY_NORMAL, 2048);
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mainwkq_monitor_init();
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os_run_func((os_run_func_t)main, 0, 0, 0);
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#ifdef CSKY_OS
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csi_kernel_start();
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#endif
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#ifdef OHOS
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LOS_Start();
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#endif
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}
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