571 lines
14 KiB
C
571 lines
14 KiB
C
#include "typesdef.h"
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#include "errno.h"
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#include "osal/irq.h"
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#include "devid.h"
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#include "dev/vpp/hgvpp.h"
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#include "osal/string.h"
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struct hgvpp_hw
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{
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__IO uint32_t CON;
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__IO uint32_t SIZE;
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__IO uint32_t DLT;
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__IO uint32_t DHT;
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__IO uint32_t STA;
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__IO uint32_t DMA_YADR;
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__IO uint32_t DMA_UADR;
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__IO uint32_t DMA_VADR;
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__IO uint32_t DMA_YADR1;
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__IO uint32_t DMA_UADR1;
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__IO uint32_t DMA_VADR1;
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__IO uint32_t IWM0_CON;
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__IO uint32_t IWM0_SIZE;
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__IO uint32_t IWM0_YUV;
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__IO uint32_t IWM0_LADR;
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__IO uint32_t IWM0_IDX0;
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__IO uint32_t IWM0_IDX1;
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__IO uint32_t IWM0_IDX2;
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__IO uint32_t IWM1_CON;
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__IO uint32_t IWM1_SIZE;
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__IO uint32_t IWM1_YUV;
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__IO uint32_t IWM1_LADR;
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__IO uint32_t IPF_SADR;
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__IO uint32_t MD_CON;
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__IO uint32_t MD_WIN_CON0;
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__IO uint32_t MD_WIN_CON1;
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__IO uint32_t MD_BASE_ADDR;
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__IO uint32_t ITP_YADR;
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__IO uint32_t ITP_UADR;
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__IO uint32_t ITP_VADR;
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};
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vpp_irq_hdl vppirq_vector_table[VPP_IRQ_NUM];
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volatile uint32 vppirq_dev_table[VPP_IRQ_NUM];
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static int32 hgvpp_ioctl(struct vpp_device *p_vpp, enum vpp_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2)
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{
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int32 ret_val = RET_OK;
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uint32 w,h,num;
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uint32 x_s,y_s,x_e,y_e;
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//uint32 *size_array;
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struct hgvpp *vpp_hw = (struct hgvpp*)p_vpp;
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struct hgvpp_hw *hw = (struct hgvpp_hw *)vpp_hw->hw;
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switch(ioctl_cmd){
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case VPP_IOCTL_CMD_ITP_AUTO_CLOSE:
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if(param1)
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hw->CON |= BIT(30);
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else
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hw->CON &= ~BIT(30);
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break;
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case VPP_IOCTL_CMD_SET_TAKE_PHOTO_LINEBUF:
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if(param1 < 8){
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hw->CON &= ~(0x7<<17);
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hw->CON |= (param1<<17);
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}
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break;
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case VPP_IOCTL_CMD_DIS_UV_MODE:
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if(param1)
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hw->CON |= BIT(4);
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else
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hw->CON &= ~BIT(4);
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break;
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case VPP_IOCTL_CMD_SET_THRESHOLD:
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hw->DLT = param1;
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hw->DHT = param2;
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_RC:
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if(param1)
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hw->IWM0_CON |= BIT(5);
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else
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hw->IWM0_CON &= ~BIT(5);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK1_RC:
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if(param1)
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hw->IWM1_CON |= BIT(5);
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else
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hw->IWM1_CON &= ~BIT(5);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_COLOR:
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hw->IWM0_YUV = param1;
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK1_COLOR:
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hw->IWM1_YUV = param1;
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_BMPADR:
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hw->IWM0_LADR = param1;
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK1_BMPADR:
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hw->IWM1_LADR = param1;
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_LOCATED:
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hw->IWM0_CON &= ~(0xff<<16);
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hw->IWM0_CON &= ~(0xff<<24);
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hw->IWM0_CON |= (((param1&0Xff00)>>8)<<24);
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hw->IWM0_CON |= ((param1&0Xff)<<16);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK1_LOCATED:
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hw->IWM1_CON &= ~(0xff<<16);
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hw->IWM1_CON &= ~(0xff<<24);
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hw->IWM1_CON |= (((param1&0Xff00)>>8)<<24);
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hw->IWM1_CON |= ((param1&0Xff)<<16);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_CONTRAST:
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hw->IWM0_CON &= ~(0x7<<2);
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hw->IWM0_CON |= (param1<<2);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK1_CONTRAST:
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hw->IWM1_CON &= ~(0x7<<2);
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hw->IWM1_CON |= (param1<<2);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_CHAR_SIZE_AND_NUM:
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w = param1&0xff;
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h = ((param1&0xff00)>>8)&0xff;
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num = param2&0xff;
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hw->IWM0_SIZE &= ~(0x1f<<0);
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hw->IWM0_SIZE |= (num<<0);
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hw->IWM0_SIZE &= ~(0x3f<<5);
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hw->IWM0_SIZE |= (w<<5);
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hw->IWM0_SIZE &= ~(0x3ff<<11);
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hw->IWM0_SIZE |= ((w*num)<<11);
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hw->IWM0_SIZE &= ~(0xff<<21);
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hw->IWM0_SIZE |= (h<<21);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_CHAR_IDX:
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if(param2 > 23)
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return ret_val;
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if(param2 < 8){
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hw->IWM0_IDX0 &= ~(0xf<<(param2*4));
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hw->IWM0_IDX0 |= (param1<<(param2*4));
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}
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else if(param2 < 16){
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hw->IWM0_IDX1 &= ~(0xf<<((param2-8)*4));
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hw->IWM0_IDX1 |= (param1<<((param2-8)*4));
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}else{
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hw->IWM0_IDX2 &= ~(0xf<<((param2-16)*4));
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hw->IWM0_IDX2 |= (param1<<((param2-16)*4));
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}
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK1_PHOTO_SIZE:
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w = param1&0xff;
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h = ((param1&0xff00)>>8)&0xff;
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hw->IWM1_SIZE &= ~(0xff<<11);
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hw->IWM1_SIZE |= (w<<11);
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hw->IWM1_SIZE &= ~(0xff<<21);
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hw->IWM1_SIZE |= (h<<21);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_MODE:
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if(param1)
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hw->IWM0_CON |= BIT(1);
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else
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hw->IWM0_CON &= ~BIT(1);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK1_MODE:
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if(param1)
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hw->IWM1_CON |= BIT(1);
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else
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hw->IWM1_CON &= ~BIT(1);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK0_EN:
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if(param1)
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hw->IWM0_CON |= BIT(0);
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else
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hw->IWM0_CON &= ~BIT(0);
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break;
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case VPP_IOCTL_CMD_SET_WATERMARK1_EN:
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if(param1)
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hw->IWM1_CON |= BIT(0);
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else
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hw->IWM1_CON &= ~BIT(0);
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break;
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case VPP_IOCTL_CMD_SET_MOTION_DET_EN:
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if(param1){
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hw->MD_CON &= ~(0x1f<<18);
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hw->MD_CON |= (BIT(23));
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hw->MD_CON |= BIT(0);
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}
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else{
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hw->MD_CON &= ~BIT(0);
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}
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break;
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case VPP_IOCTL_CMD_SET_MOTION_CALBUF:
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hw->MD_BASE_ADDR = param1;
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break;
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case VPP_IOCTL_CMD_SET_MOTION_RANGE:
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x_s = param1&0xffff;
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y_s = ((param1&0xffff0000)>>16)&0xffff;
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x_e = param2&0xffff;
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y_e = ((param2&0xffff0000)>>16)&0xffff;
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//hw->MD_WIN_CON0 = param1;
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//hw->MD_WIN_CON1 = param1;
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hw->MD_WIN_CON0 = (x_s | (y_s<<16));
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hw->MD_WIN_CON1 = ((x_e-1) | ((y_e-1)<<16));
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break;
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case VPP_IOCTL_CMD_SET_MOTION_BLK_THRESHOLD:
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param1 = param1&0xff;
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hw->MD_CON &= ~(0xff<<1);
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hw->MD_CON |= (param1<<1);
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break;
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case VPP_IOCTL_CMD_SET_MOTION_FRAME_THRESHOLD:
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param1 = param1&0x1ff;
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hw->MD_CON &= ~(0x1ff<<9);
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hw->MD_CON |= (param1<<9);
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break;
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case VPP_IOCTL_CMD_SET_IFP_ADDR:
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hw->IPF_SADR = param1;
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break;
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case VPP_IOCTL_CMD_SET_IFP_EN:
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if(param1)
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hw->CON |= BIT(28);
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else
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hw->CON &= ~BIT(28);
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break;
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case VPP_IOCTL_CMD_SET_MODE:
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if(param1)
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hw->CON |= BIT(1);
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else
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hw->CON &= ~BIT(1);
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break;
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case VPP_IOCTL_CMD_SET_SIZE:
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w = param1;
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h = param2;
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hw->SIZE = 0;
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hw->SIZE |= (w<<0);
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hw->SIZE |= (h<<11);
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break;
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case VPP_IOCTL_CMD_SET_YCBCR:
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if(param1 > 3){
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os_printf("set ycbcr error:%d\r\n",param1);
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}
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hw->CON &= ~(BIT(2)|BIT(3));
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hw->CON |= param1<<2;
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break;
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case VPP_IOCTL_CMD_BUF0_CNT:
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if(param1 > 16){
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os_printf("set buf0 error:%d\r\n",param1);
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}
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hw->CON &= ~(0x0f<<7);
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hw->CON |= (param1<<7);
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break;
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case VPP_IOCTL_CMD_BUF1_CNT:
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if(param1 > 16){
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os_printf("set buf1 error:%d\r\n",param1);
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}
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hw->CON &= ~(0x0f<<13);
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hw->CON |= (param1<<13);
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break;
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case VPP_IOCTL_CMD_BUF1_EN:
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if(param1)
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hw->CON |= BIT(11);
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else
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hw->CON &= ~BIT(11);
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break;
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case VPP_IOCTL_CMD_BUF1_SHRINK:
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if(param1)
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hw->CON &= ~BIT(12); // 1/2
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else
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hw->CON |= BIT(12); // 1/3
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break;
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case VPP_IOCTL_CMD_INPUT_INTERFACE:
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if(param1)
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hw->CON |= BIT(5);
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else
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hw->CON &= ~BIT(5);
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break;
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case VPP_IOCTL_CMD_BUF0_Y_ADDR:
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hw->DMA_YADR = param1;
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break;
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case VPP_IOCTL_CMD_BUF0_U_ADDR:
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hw->DMA_UADR = param1;
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break;
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case VPP_IOCTL_CMD_BUF0_V_ADDR:
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hw->DMA_VADR = param1;
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break;
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case VPP_IOCTL_CMD_BUF1_Y_ADDR:
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hw->DMA_YADR1 = param1;
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break;
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case VPP_IOCTL_CMD_BUF1_U_ADDR:
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hw->DMA_UADR1 = param1;
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break;
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case VPP_IOCTL_CMD_BUF1_V_ADDR:
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hw->DMA_VADR1 = param1;
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break;
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case VPP_IOCTL_CMD_ITP_Y_ADDR:
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hw->ITP_YADR = param1;
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break;
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case VPP_IOCTL_CMD_ITP_U_ADDR:
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hw->ITP_UADR = param1;
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break;
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case VPP_IOCTL_CMD_ITP_V_ADDR:
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hw->ITP_VADR = param1;
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break;
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case VPP_IOCTL_CMD_ITP_EN:
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if(param1)
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hw->CON |= BIT(29);
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else
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hw->CON &= ~BIT(29);
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break;
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default:
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os_printf("NO VPP IOCTL:%d\r\n",ioctl_cmd);
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ret_val = -ENOTSUPP;
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break;
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}
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return ret_val;
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}
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void VPP_IRQHandler_action(void *p_vpp)
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{
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uint32 sta = 0;
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uint8 loop;
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struct hgvpp *vpp_hw = (struct hgvpp*)p_vpp;
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struct hgvpp_hw *hw = (struct hgvpp_hw *)vpp_hw->hw;
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sta = hw->STA;
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for(loop = 0;loop < VPP_IRQ_NUM;loop++){
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if(sta&BIT(loop)){
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hw->STA = BIT(loop);
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if(vppirq_vector_table[loop] != NULL)
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vppirq_vector_table[loop] (loop,vppirq_dev_table[loop],0);
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}
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}
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}
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void irq_vpp_enable(struct vpp_device *p_vpp,uint8 mode,uint8 irq){
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struct hgvpp *vpp_hw = (struct hgvpp*)p_vpp;
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struct hgvpp_hw *hw = (struct hgvpp_hw *)vpp_hw->hw;
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if(mode){
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hw->CON |= BIT(irq+20);
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}else{
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hw->CON &= ~BIT(irq+20);
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}
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}
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int32 vppirq_register(struct vpp_device *p_vpp,uint32 irq, vpp_irq_hdl isr, uint32 dev_id){
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struct hgvpp *vpp_hw = (struct hgvpp*)p_vpp;
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struct hgvpp_hw *hw = (struct hgvpp_hw *)vpp_hw->hw;
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request_irq(vpp_hw->irq_num, VPP_IRQHandler_action, p_vpp);
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irq_vpp_enable(p_vpp, 1, irq);
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vppirq_vector_table[irq] = isr;
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vppirq_dev_table[irq] = dev_id;
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hw->STA |= BIT(irq);
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os_printf("vppirq_register:%d %x %x\r\n",irq,(uint32)vppirq_vector_table[irq],(uint32)isr);
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return 0;
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}
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int32 vppirq_unregister(struct vpp_device *p_vpp,uint32 irq){
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struct hgvpp *vpp_hw = (struct hgvpp*)p_vpp;
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struct hgvpp_hw *hw = (struct hgvpp_hw *)vpp_hw->hw;
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irq_vpp_enable(p_vpp, 0, irq);
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vppirq_vector_table[irq] = NULL;
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vppirq_dev_table[irq] = 0;
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hw->STA |= BIT(irq);
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return 0;
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}
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static int32 hgvpp_open(struct vpp_device *p_vpp){
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struct hgvpp *vpp_hw = (struct hgvpp*)p_vpp;
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struct hgvpp_hw *hw = (struct hgvpp_hw *)vpp_hw->hw;
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hw->CON |= BIT(0);
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vpp_hw->opened = 1;
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vpp_hw->dsleep = 0;
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irq_enable(vpp_hw->irq_num);
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return 0;
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}
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static int32 hgvpp_close(struct vpp_device *p_vpp){
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struct hgvpp *vpp_hw = (struct hgvpp*)p_vpp;
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struct hgvpp_hw *hw = (struct hgvpp_hw *)vpp_hw->hw;
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hw->CON &= ~BIT(0);
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vpp_hw->opened = 0;
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vpp_hw->dsleep = 0;
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irq_disable(vpp_hw->irq_num);
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return 0;
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}
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int32 hgvpp_suspend(struct dev_obj *obj){
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struct hgvpp *vpp_hw = (struct hgvpp*)obj;
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struct hgvpp_hw *hw;
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struct hgvpp_hw *hw_cfg;
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//确保已经被打开并且休眠过,直接返回
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if(!vpp_hw->opened || vpp_hw->dsleep)
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{
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return RET_OK;
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}
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vpp_hw->dsleep = 1;
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vpp_hw->cfg_backup = (uint32 *)os_malloc(sizeof(struct hgvpp_hw));
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hw_cfg = (struct hgvpp_hw*)vpp_hw->cfg_backup;
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hw = (struct hgvpp_hw*)vpp_hw->hw;
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hw_cfg->CON = hw->CON;
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hw_cfg->SIZE = hw->SIZE;
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hw_cfg->DLT = hw->DLT;
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hw_cfg->DHT = hw->DHT;
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hw_cfg->STA = hw->STA;
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hw_cfg->DMA_YADR = hw->DMA_YADR;
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hw_cfg->DMA_UADR = hw->DMA_UADR;
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hw_cfg->DMA_VADR = hw->DMA_VADR;
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hw_cfg->DMA_YADR1 = hw->DMA_YADR1;
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hw_cfg->DMA_UADR1 = hw->DMA_UADR1;
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hw_cfg->DMA_VADR1 = hw->DMA_VADR1;
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hw_cfg->IWM0_CON = hw->IWM0_CON;
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hw_cfg->IWM0_SIZE = hw->IWM0_SIZE;
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hw_cfg->IWM0_YUV = hw->IWM0_YUV;
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hw_cfg->IWM0_LADR = hw->IWM0_LADR;
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hw_cfg->IWM0_IDX0 = hw->IWM0_IDX0;
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hw_cfg->IWM0_IDX1 = hw->IWM0_IDX1;
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hw_cfg->IWM0_IDX2 = hw->IWM0_IDX2;
|
|
hw_cfg->IWM1_CON = hw->IWM1_CON;
|
|
hw_cfg->IWM1_SIZE = hw->IWM1_SIZE;
|
|
hw_cfg->IWM1_YUV = hw->IWM1_YUV;
|
|
hw_cfg->IWM1_LADR = hw->IWM1_LADR;
|
|
hw_cfg->IPF_SADR = hw->IPF_SADR;
|
|
hw_cfg->MD_CON = hw->MD_CON;
|
|
hw_cfg->MD_WIN_CON0 = hw->MD_WIN_CON0;
|
|
hw_cfg->MD_WIN_CON1 = hw->MD_WIN_CON1;
|
|
hw_cfg->MD_BASE_ADDR = hw->MD_BASE_ADDR;
|
|
hw_cfg->ITP_YADR = hw->ITP_YADR;
|
|
hw_cfg->ITP_UADR = hw->ITP_UADR;
|
|
hw_cfg->ITP_VADR = hw->ITP_VADR;
|
|
|
|
|
|
irq_disable(vpp_hw->irq_num);
|
|
return 0;
|
|
}
|
|
|
|
int32 hgvpp_resume(struct dev_obj *obj){
|
|
struct hgvpp *vpp_hw = (struct hgvpp*)obj;
|
|
struct hgvpp_hw *hw;
|
|
struct hgvpp_hw *hw_cfg;
|
|
//如果已经被打开并且没有休眠过,直接返回
|
|
if(!vpp_hw->opened || !vpp_hw->dsleep)
|
|
{
|
|
return RET_OK;
|
|
}
|
|
vpp_hw->dsleep = 0;
|
|
hw_cfg = (struct hgvpp_hw*)vpp_hw->cfg_backup;
|
|
hw = (struct hgvpp_hw*)vpp_hw->hw;
|
|
hw->CON = hw_cfg->CON;
|
|
hw->SIZE = hw_cfg->SIZE;
|
|
hw->DLT = hw_cfg->DLT;
|
|
hw->DHT = hw_cfg->DHT;
|
|
hw->STA = hw_cfg->STA;
|
|
hw->DMA_YADR = hw_cfg->DMA_YADR;
|
|
hw->DMA_UADR = hw_cfg->DMA_UADR;
|
|
hw->DMA_VADR = hw_cfg->DMA_VADR;
|
|
hw->DMA_YADR1 = hw_cfg->DMA_YADR1;
|
|
hw->DMA_UADR1 = hw_cfg->DMA_UADR1;
|
|
hw->DMA_VADR1 = hw_cfg->DMA_VADR1;
|
|
hw->IWM0_CON = hw_cfg->IWM0_CON;
|
|
hw->IWM0_SIZE = hw_cfg->IWM0_SIZE;
|
|
hw->IWM0_YUV = hw_cfg->IWM0_YUV;
|
|
hw->IWM0_LADR = hw_cfg->IWM0_LADR;
|
|
hw->IWM0_IDX0 = hw_cfg->IWM0_IDX0;
|
|
hw->IWM0_IDX1 = hw_cfg->IWM0_IDX1;
|
|
hw->IWM0_IDX2 = hw_cfg->IWM0_IDX2;
|
|
hw->IWM1_CON = hw_cfg->IWM1_CON;
|
|
hw->IWM1_SIZE = hw_cfg->IWM1_SIZE;
|
|
hw->IWM1_YUV = hw_cfg->IWM1_YUV;
|
|
hw->IWM1_LADR = hw_cfg->IWM1_LADR;
|
|
hw->IPF_SADR = hw_cfg->IPF_SADR;
|
|
hw->MD_CON = hw_cfg->MD_CON;
|
|
hw->MD_WIN_CON0 = hw_cfg->MD_WIN_CON0;
|
|
hw->MD_WIN_CON1 = hw_cfg->MD_WIN_CON1;
|
|
hw->MD_BASE_ADDR = hw_cfg->MD_BASE_ADDR;
|
|
hw->ITP_YADR = hw_cfg->ITP_YADR;
|
|
hw->ITP_UADR = hw_cfg->ITP_UADR;
|
|
hw->ITP_VADR = hw_cfg->ITP_VADR;
|
|
irq_enable(vpp_hw->irq_num);
|
|
os_free(vpp_hw->cfg_backup);
|
|
return 0;
|
|
}
|
|
|
|
static const struct vpp_hal_ops dev_ops = {
|
|
.open = hgvpp_open,
|
|
.close = hgvpp_close,
|
|
.ioctl = hgvpp_ioctl,
|
|
.request_irq = vppirq_register,
|
|
.release_irq = vppirq_unregister,
|
|
#ifdef CONFIG_SLEEP
|
|
.ops.suspend = hgvpp_suspend,
|
|
.ops.resume = hgvpp_resume,
|
|
#endif
|
|
};
|
|
|
|
|
|
|
|
int32 hgvpp_attach(uint32 dev_id, struct hgvpp *vpp){
|
|
vpp->opened = 0;
|
|
vpp->use_dma = 0;
|
|
vpp->irq_hdl = NULL;
|
|
//memset(dvp->irq_hdl,0,sizeof(dvp->irq_hdl));
|
|
vpp->irq_data = 0;
|
|
//memset(dvp->irq_data,0,sizeof(dvp->irq_data));
|
|
vpp->dev.dev.ops = (const struct devobj_ops *)&dev_ops;
|
|
|
|
irq_disable(vpp->irq_num);
|
|
dev_register(dev_id, (struct dev_obj *)vpp);
|
|
return 0;
|
|
}
|
|
|
|
|