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pure sdk for main

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This commit is contained in:
divadiow
2025-08-27 09:51:58 +01:00
parent f0d033f1c9
commit 0571416e7c
3283 changed files with 1577720 additions and 1 deletions
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sdk/lib/net/ethphy/phy/auto_phy.c
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#include "typesdef.h"
#include "list.h"
#include "errno.h"
#include "dev.h"
#include "osal/string.h"
#include "osal/semaphore.h"
#include "osal/mutex.h"
#include "osal/task.h"
#include "hal/netdev.h"
#include "lib/net/ethphy/eth_mdio_bus.h"
#include "lib/net/ethphy/eth_phy.h"
#include "lib/net/ethphy/phy/auto_phy.h"
static int auto_phy_config_init(struct ethernet_phy_device *phydev)
{
uint16 val = 0;
if(phydev->phy_id == 0x2430c54) { // ip101gr
phy_write(phydev, 13, 0x0007);
phy_write(phydev, 14, 0x003C);
phy_write(phydev, 13, 0x4007);
phy_write(phydev, 14, 0x0000);
os_printf("IP101GR phy two led mode \n\r");
} else if(phydev->phy_id == 0x128) { // sz18201
phy_write(phydev, 0x1e, 0x40c0);//config led0
phy_write(phydev, 0x1f, 0x1300);//act
phy_write(phydev, 0x1e, 0x40c3);//config led1
phy_write(phydev, 0x1f, 0x30); //link
os_printf("SZ18201 phy two led mode \n\r");
} else if(phydev->phy_id == 0x1cc816){ // rt8201
phy_write(phydev, 31, 0x7);
val = phy_read(phydev, 19);
val &= 0xffcf;
phy_write(phydev, 19, val);
phy_write(phydev, 31, 0);
os_printf("RT8201 phy two led mode \n\r");
} else { // config as rt8201
phy_write(phydev, 31, 0x7);
val = phy_read(phydev, 19);
val &= 0xffcf;
phy_write(phydev, 19, val);
phy_write(phydev, 31, 0);
os_printf("This phy may not be supported! \n\r");
}
return genphy_config_init(phydev);
}
struct ethernet_phy_driver auto_phy_driver = {
.features = PHY_BASIC_FEATURES,
.config_init = auto_phy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
};
sdk/lib/net/ethphy/phy/ip101g.c
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#include "typesdef.h"
#include "list.h"
#include "errno.h"
#include "dev.h"
#include "osal/string.h"
#include "osal/semaphore.h"
#include "osal/mutex.h"
#include "osal/task.h"
#include "hal/netdev.h"
#include "lib/net/ethphy/eth_mdio_bus.h"
#include "lib/net/ethphy/eth_phy.h"
#include "lib/net/ethphy/phy/ip101g.h"
static int ip101g_config_init(struct ethernet_phy_device *phydev)
{
/* Disalbe 100BASE-TX EEE capability. Fix the problem of a large number of
* symbol errors in the communication between IP101GRI and Realtek RTL8168
* network card.
*/
phy_write(phydev, 13, 0x0007);
phy_write(phydev, 14, 0x003C);
phy_write(phydev, 13, 0x4007);
phy_write(phydev, 14, 0x0000);
return genphy_config_init(phydev);
}
struct ethernet_phy_driver ip101g_driver = {
.features = PHY_BASIC_FEATURES,
.config_init = ip101g_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
};
sdk/lib/net/ethphy/phy/rtl8201f.c
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#include "typesdef.h"
#include "list.h"
#include "errno.h"
#include "dev.h"
#include "osal/string.h"
#include "osal/semaphore.h"
#include "osal/mutex.h"
#include "osal/task.h"
#include "hal/netdev.h"
#include "lib/net/ethphy/eth_mdio_bus.h"
#include "lib/net/ethphy/eth_phy.h"
#include "lib/net/ethphy/phy/rtl8201f.h"
static int rtl8201f_config_init(struct ethernet_phy_device *phydev)
{
uint16 val = 0;
/* LED config */
phy_write(phydev, 31, 0x7);
val = phy_read(phydev, 19);
val &= 0xffcf;
phy_write(phydev, 19, val);
phy_write(phydev, 31, 0);
return genphy_config_init(phydev);
}
struct ethernet_phy_driver rtl8201f_driver = {
.features = PHY_BASIC_FEATURES,
.config_init = rtl8201f_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
};
sdk/lib/net/ethphy/phy/sz18201.c
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#include "typesdef.h"
#include "list.h"
#include "errno.h"
#include "dev.h"
#include "osal/string.h"
#include "osal/semaphore.h"
#include "osal/mutex.h"
#include "osal/task.h"
#include "hal/netdev.h"
#include "lib/net/ethphy/eth_mdio_bus.h"
#include "lib/net/ethphy/eth_phy.h"
#include "lib/net/ethphy/phy/sz18201.h"
static int sz18201_config_init(struct ethernet_phy_device *phydev)
{
/* LED config */
#ifdef LED1_SINGLE_LED_MODE
phy_write(phydev, 0x1e, 0x40c3);//config led1
phy_write(phydev, 0x1f, 0x320); //link+ack(default value)
os_printf("phy led1 - single led mode \n\r");
#endif
#ifdef LED0_SINGLE_LED_MODE
phy_write(phydev, 0x1e, 0x40c0);//config led0
phy_write(phydev, 0x1f, 0x320); //link+ack
os_printf("phy led0 - single led mode \n\r");
#endif
#ifdef SINGLE_LED_MODE
phy_write(phydev, 0x1e, 0x40c3);//config led1
phy_write(phydev, 0x1f, 0x320); //link+ack(default value)
phy_write(phydev, 0x1e, 0x40c0);//config led0
phy_write(phydev, 0x1f, 0x320); //link+ack
os_printf("phy single led mode \n\r");
#endif
//#ifdef TWO_LED_MODE //used as default mode
phy_write(phydev, 0x1e, 0x40c0);//config led0
phy_write(phydev, 0x1f, 0x1300);//act
phy_write(phydev, 0x1e, 0x40c3);//config led1
phy_write(phydev, 0x1f, 0x30); //link
os_printf("SZ18201 phy two led mode \n\r");
//#endif
#ifdef TWO_LED_MODE2
phy_write(phydev, 0x1e, 0x40c3);//config led1
phy_write(phydev, 0x1f, 0x1300);//act
phy_write(phydev, 0x1e, 0x40c0);//config led0
phy_write(phydev, 0x1f, 0x30); //link
os_printf("phy two led mode2 \n\r");
#endif
#ifdef TEST_LED_MODE
//phy_write(phydev, 0x1e, 0x40c3);//config led1
//phy_write(phydev, 0x1f, 0x20); //link ok
//phy_write(phydev, 0x1f, 0x1300);//act ok
//phy_write(phydev, 0x1f, 0x1320);//link+act ok
//phy_write(phydev, 0x1e, 0x40c0);//config led0
//phy_write(phydev, 0x1f, 0x31); //link 20/21/311/321/320 err 30
//phy_write(phydev, 0x1f, 0x1320);//act 1300 err
//os_printf("\n\rphy test led \n\r\n\r");
#endif
return genphy_config_init(phydev);
}
struct ethernet_phy_driver sz18201_driver = {
.features = PHY_BASIC_FEATURES,
.config_init = sz18201_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
};