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pure sdk for main

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This commit is contained in:
divadiow
2025-08-27 09:51:58 +01:00
parent f0d033f1c9
commit 0571416e7c
3283 changed files with 1577720 additions and 1 deletions
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sdk/include/dev/spi/hgic_sdspi.h
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#ifndef _HGIC_SDSPI_H_
#define _HGIC_SDSPI_H_
#ifdef __cplusplus
extern "C" {
#endif
int32 hgic_sdspi_attach(uint32 dev_id, uint32 spi_dev);
#ifdef __cplusplus
}
#endif
#endif
sdk/include/dev/spi/hgspi_v1.h
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#ifndef _HGSPI_V1_H_
#define _HGSPI_V1_H_
#include "hal/spi.h"
#ifdef __cplusplus
extern "C" {
#endif
struct hgspi_v1 {
struct spi_device dev;
uint32 hw;
uint32 irq_num;
spi_irq_hdl irq_hdl;
uint32 irq_data;
//struct os_mutex os_spi_tx_lock;
//struct os_mutex os_spi_rx_lock;
struct os_mutex os_spi_lock;
struct os_semaphore os_spi_tx_done;
struct os_semaphore os_spi_rx_done;
uint32 timeout;
uint16 len_threshold;
uint16 spi_tx_done :1,
spi_rx_done :1,
spi_irq_flag_tx_done :1,
spi_irq_flag_rx_done :1,
spi_tx_async :1,
spi_rx_async :1,
opened :1,
dsleep :1;
#ifdef CONFIG_SLEEP
struct {
uint32 con0;
uint32 con1;
uint32 baud;
uint32 tdmalen;
uint32 rdmalen;
uint32 tstadr;
uint32 rstadr;
uint32 slavesta;
uint32 ssp_dly;
}bp_regs;
uint32 bp_irq_flags;
spi_irq_hdl bp_irq_hdl;
uint32 bp_irq_data;
struct os_mutex bp_suspend_lock;
struct os_mutex bp_resume_lock;
#endif
};
int32 hgspi_v1_attach(uint32 dev_id, struct hgspi_v1 *p_spi);
#ifdef __cplusplus
}
#endif
#endif /* _HGSPI_V1_H_ */
sdk/include/dev/spi/hgspi_v2.h
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#ifndef _HGSPI_V2_H
#define _HGSPI_V2_H
#ifdef __cplusplus
extern "C" {
#endif
struct hgspi_v2 {
struct spi_device dev;
uint32 hw ;
spi_irq_hdl irq_hdl ;
uint32 irq_data;
uint32 irq_num ;
uint16 opened ;
uint16 spi_irq_flag_tx_done: 1,
spi_irq_flag_rx_done: 1;
};
int32 hgspi_v2_attach(uint32 dev_id, struct hgspi_v2 *spi);
#ifdef __cplusplus
}
#endif
#endif
sdk/include/dev/spi/hgspi_v3.h
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#ifndef _HGSPI_V3_H_
#define _HGSPI_V3_H_
#include "hal/spi.h"
#ifdef __cplusplus
extern "C" {
#endif
struct hgspi_v3 {
struct spi_device dev;
uint32 hw;
uint32 irq_num;
spi_irq_hdl irq_hdl;
uint32 irq_data;
//struct os_mutex os_spi_tx_lock;
//struct os_mutex os_spi_rx_lock;
struct os_mutex os_spi_lock;
struct os_semaphore os_spi_tx_done;
struct os_semaphore os_spi_rx_done;
uint32 timeout;
uint16 len_threshold;
uint16 spi_tx_done :1,
spi_rx_done :1,
spi_irq_flag_tx_done :1,
spi_irq_flag_rx_done :1,
spi_tx_async :1,
spi_rx_async :1,
opened :1,
dsleep :1;
#ifdef CONFIG_SLEEP
struct {
uint32 con0;
uint32 con1;
uint32 cmd_data;
uint32 timecon;
uint32 tdmalen;
uint32 rdmalen;
uint32 tdmacnt;
uint32 rdmacnt;
uint32 tstadr;
uint32 rstadr;
uint32 sta1;
uint32 sta2;
uint32 slavesta;
uint32 ownadrcon;
uint32 rbuf;
uint32 timeoutcon;
uint32 rxtimeoutcon;
uint32 rstadr1;
uint32 vsync_tcon;
uint32 hsync_tcon;
}bp_regs;
uint32 bp_irq_flags;
spi_irq_hdl bp_irq_hdl;
uint32 bp_irq_data;
struct os_mutex bp_suspend_lock;
struct os_mutex bp_resume_lock;
#endif
};
int32 hgspi_v3_attach(uint32 dev_id, struct hgspi_v3 *p_spi);
#ifdef __cplusplus
}
#endif
#endif /* _HGSPI_V3_H_ */
sdk/include/dev/spi/hgspi_xip.h
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#ifndef _HGSPI_XIP_H_
#define _HGSPI_XIP_H_
#include "hal/spi.h"
#ifdef __cplusplus
extern "C" {
#endif
enum hgspi_xip_flags {
hgspi_xip_flags_ready,
hgspi_xip_flags_suspend,
hgspi_xip_flags_suspend_pasr,
hgspi_xip_flags_suspend_ulp,
hgspi_xip_flags_suspend_pd,
hgspi_xip_flags_xip,
};
struct hgspi_xip {
struct spi_device dev;
// struct os_mutex xip_lock;
uint32 hw;
uint32 flags;
#ifdef CONFIG_SLEEP
uint32 regs[30];
#endif
};
struct hgcqspi {
//struct qspi_device dev;
void *hw;
uint32 irq_num;
//qspi_irq_hdl irq_hdl;
uint32 irq_data;
uint32 opened;
uint32 flags;
};
struct hgxip_flash_custom_read
{
uint8_t dummys; //最大31,内部默认有24个dummys
uint8_t cmd;
uint16_t size;
uint32_t addr;
uint8_t *buf;
};
struct hgxip_flash_reg_opt_param
{
uint8_t cmd;
/* write opt when pre_cmd is valid(0xFF != pre_cmd); e.g.: 0x06/0x50 */
uint8_t pre_cmd;
uint8_t len;
uint8_t *buf;
};
enum MSROM_FUNC
{
MSROM_MEMSET,
MSROM_MEMCPY,
MSROM_MEMCMP,
MSROM_STRCASECMP,
MSROM_QSPI_CMD_BUSY_WAIT = MSROM_STRCASECMP,
MSROM_STRNCASECMP,
MSROM_HIGHPASS_FILTER_100HZ_ASM = MSROM_STRNCASECMP,
MSROM_QSPI_XIP_ERASE,
MSROM_QSPI_XIP_READ,
MSROM_QSPI_XIP_WRITE,
MSROM_QSPI_XIP_OPT_ENTER,
MSROM_QSPI_XIP_OPT_EXIT,
MSROM_QSPI_ENTER_XIP_MODE,
MSROM_QSPI_EXIT_XIP_MODE,
MSROM_QSPI_STIG,
MSROM_OSPI_PSRAM_MRR,
MSROM_OSPI_PSRAM_MRW,
MSROM_OSPI_STIG,
};
int32 hgspi_xip_attach(uint32 dev_id, struct hgspi_xip *p_spi);
uint32_t get_msrom_func(uint32_t func_code);
#ifdef __cplusplus
}
#endif
#endif /* _HGSPI_V1_H_ */