pure sdk for main

sdk/hal/adc.c

@@ -0,0 +1,70 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/adc.h"
+
+int32 adc_open(struct adc_device *adc)
+{
+    if (adc) {
+        return ((const struct adc_hal_ops *)adc->dev.ops)->open(adc);
+    }
+    return RET_ERR;
+}
+
+int32 adc_close(struct adc_device *adc)
+{
+    if (adc) {
+        return ((const struct adc_hal_ops *)adc->dev.ops)->close(adc);
+    }
+    return RET_ERR;
+}
+
+int32 adc_add_channel(struct adc_device *adc, uint32 channel)
+{
+    if (adc && ((const struct adc_hal_ops *)adc->dev.ops)->add_channel) {
+        return ((const struct adc_hal_ops *)adc->dev.ops)->add_channel(adc, channel);
+    }
+    return RET_ERR;
+}
+
+int32 adc_delete_channel(struct adc_device *adc, uint32 channel)
+{
+    if (adc && ((const struct adc_hal_ops *)adc->dev.ops)->delete_channel) {
+        return ((const struct adc_hal_ops *)adc->dev.ops)->delete_channel(adc, channel);
+    }
+    return RET_ERR;
+}
+
+int32 adc_get_value(struct adc_device *adc, uint32 channel, uint32 *raw_data)
+{
+    if (adc && ((const struct adc_hal_ops *)adc->dev.ops)->get_value) {
+        return ((const struct adc_hal_ops *)adc->dev.ops)->get_value(adc, channel, raw_data);
+    }
+    return RET_ERR;
+}
+
+int32 adc_ioctl(struct adc_device *adc, enum adc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2)
+{
+    if (adc && ((const struct adc_hal_ops *)adc->dev.ops)->ioctl) {
+        return ((const struct adc_hal_ops *)adc->dev.ops)->ioctl(adc, ioctl_cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+int32 adc_request_irq(struct adc_device *adc, enum adc_irq_flag irq_flag, adc_irq_hdl irq_hdl, uint32 irq_data)
+{
+    if (adc && ((const struct adc_hal_ops *)adc->dev.ops)->request_irq) {
+        return ((const struct adc_hal_ops *)adc->dev.ops)->request_irq(adc, irq_flag, irq_hdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 adc_release_irq(struct adc_device *adc, enum adc_irq_flag irq_flag)
+{
+    if (adc && ((const struct adc_hal_ops *)adc->dev.ops)->release_irq) {
+        return ((const struct adc_hal_ops *)adc->dev.ops)->release_irq(adc, irq_flag);
+    }
+    return RET_ERR;
+}
+

sdk/hal/auadc.c

@@ -0,0 +1,61 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/auadc.h"
+
+
+int32 auadc_open(struct auadc_device *auadc, enum auadc_sample_rate sample_rate) {
+
+    if(auadc) {
+        return ((const struct auadc_hal_ops *)auadc->dev.ops)->open(auadc, sample_rate);
+    }
+
+    return RET_ERR;
+}
+
+int32 auadc_close(struct auadc_device *auadc) {
+
+    if(auadc) {
+        return ((const struct auadc_hal_ops *)auadc->dev.ops)->close(auadc);
+    }
+
+    return RET_ERR;
+}
+
+int32 auadc_read(struct auadc_device *auadc, void* buf, uint32 bytes) {
+
+    if(auadc) {
+        return ((const struct auadc_hal_ops *)auadc->dev.ops)->read(auadc, buf, bytes);
+    }
+
+    return RET_ERR;
+}
+
+int32 auadc_ioctl(struct auadc_device *auadc, enum auadc_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2) {
+
+    if(auadc) {
+        return ((const struct auadc_hal_ops *)auadc->dev.ops)->ioctl(auadc, ioctl_cmd, param1, param2);
+    }
+
+    return RET_ERR;
+}
+
+int32 auadc_request_irq(struct auadc_device *auadc, enum auadc_irq_flag irq_flag, auadc_irq_hdl irq_hdl, uint32 irq_data) {
+
+    if(auadc) {
+        return ((const struct auadc_hal_ops *)auadc->dev.ops)->request_irq(auadc, irq_flag, irq_hdl, irq_data);
+    }
+
+    return RET_ERR;
+}
+
+int32 auadc_release_irq(struct auadc_device *auadc, enum auadc_irq_flag irq_flag) {
+
+    if(auadc) {
+        return ((const struct auadc_hal_ops *)auadc->dev.ops)->release_irq(auadc, irq_flag);
+    }
+
+    return RET_ERR;
+}
+

sdk/hal/audac.c

@@ -0,0 +1,61 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/audac.h"
+
+
+int32 audac_open(struct audac_device *audac, enum audac_sample_rate sample_rate) {
+
+    if(audac) {
+        return ((const struct audac_hal_ops *)audac->dev.ops)->open(audac, sample_rate);
+    }
+
+    return RET_ERR;
+}
+
+int32 audac_close(struct audac_device *audac) {
+
+    if(audac) {
+        return ((const struct audac_hal_ops *)audac->dev.ops)->close(audac);
+    }
+
+    return RET_ERR;
+}
+
+int32 audac_write(struct audac_device *audac, void* buf, uint32 bytes) {
+
+    if(audac) {
+        return ((const struct audac_hal_ops *)audac->dev.ops)->write(audac, buf, bytes);
+    }
+
+    return RET_ERR;
+}
+
+int32 audac_ioctl(struct audac_device *audac, enum audac_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2) {
+
+    if(audac) {
+        return ((const struct audac_hal_ops *)audac->dev.ops)->ioctl(audac, ioctl_cmd, param1, param2);
+    }
+
+    return RET_ERR;
+}
+
+int32 audac_request_irq(struct audac_device *audac, enum audac_irq_flag irq_flag, audac_irq_hdl irq_hdl, uint32 irq_data) {
+
+    if(audac) {
+        return ((const struct audac_hal_ops *)audac->dev.ops)->request_irq(audac, irq_flag, irq_hdl, irq_data);
+    }
+
+    return RET_ERR;
+}
+
+int32 audac_release_irq(struct audac_device *audac, enum audac_irq_flag irq_flag) {
+
+    if(audac) {
+        return ((const struct audac_hal_ops *)audac->dev.ops)->release_irq(audac, irq_flag);
+    }
+
+    return RET_ERR;
+}
+

sdk/hal/capture.c

@@ -0,0 +1,79 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/capture.h"
+
+
+int32 capture_init(struct capture_device *capture, enum capture_channel channel, enum capture_mode mode)
+{
+    if (capture) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->init(capture, channel, mode);
+    }
+    return RET_ERR;
+}
+
+int32 capture_deinit(struct capture_device *capture, enum capture_channel channel)
+{
+    if (capture) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->deinit(capture, channel);
+    }
+    return RET_ERR;
+}
+
+int32 capture_start(struct capture_device *capture, enum capture_channel channel)
+{
+    if (capture) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->start(capture, channel);
+    }
+    return RET_ERR;
+}
+
+int32 capture_stop(struct capture_device *capture, enum capture_channel channel)
+{
+    if (capture) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->stop(capture, channel);
+    }
+    return RET_ERR;
+}
+
+int32 capture_suspend(struct capture_device *capture, enum capture_channel channel)
+{
+    if (capture && ((const struct capture_hal_ops *)capture->dev.ops)->suspend) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->suspend(capture, channel);
+    }
+    return RET_ERR;
+}
+
+int32 capture_resume(struct capture_device *capture, enum capture_channel channel)
+{
+    if (capture && ((const struct capture_hal_ops *)capture->dev.ops)->resume) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->resume(capture, channel);
+    }
+    return RET_ERR;
+}
+
+int32 capture_ioctl(struct capture_device *capture, enum capture_channel channel, enum capture_ioctl_cmd cmd, uint32 param1, uint32 param2)
+{
+    if (capture && ((const struct capture_hal_ops *)capture->dev.ops)->ioctl) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->ioctl(capture, channel, cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+int32 capture_request_irq(struct capture_device *capture, enum capture_channel channel, enum capture_irq_flag irq_flag, capture_irq_hdl irq_hdl, uint32 data)
+{
+    if (capture && ((const struct capture_hal_ops *)capture->dev.ops)->request_irq) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->request_irq(capture, channel, irq_flag, irq_hdl, data);
+    }
+    return RET_ERR;
+}
+
+int32 capture_release_irq(struct capture_device *capture, enum capture_channel channel)
+{
+    if (capture && ((const struct capture_hal_ops *)capture->dev.ops)->release_irq) {
+        return ((const struct capture_hal_ops *)capture->dev.ops)->release_irq(capture, channel);
+    }
+    return RET_ERR;
+}
+

sdk/hal/dev.c

@@ -0,0 +1,185 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "osal/string.h"
+#include "osal/mutex.h"
+#include "osal/sleep.h"
+#include "osal/task.h"
+#include "osal/irq.h"
+
+struct dev_mgr {
+    struct dev_obj  *next;
+    struct os_mutex  mutex;
+};
+
+__bobj static struct dev_mgr s_dev_mgr;
+
+__init int32 dev_init()
+{
+    os_mutex_init(&s_dev_mgr.mutex);
+    s_dev_mgr.next = NULL;
+    return RET_OK;
+}
+
+struct dev_obj *dev_get(int32 dev_id)
+{
+    struct dev_obj *dev = NULL;
+
+    os_mutex_lock(&s_dev_mgr.mutex, osWaitForever);
+    dev = s_dev_mgr.next;
+    while (dev) {
+        if (dev->dev_id == dev_id) {
+            break;
+        }
+        dev = dev->next;
+    }
+    os_mutex_unlock(&s_dev_mgr.mutex);
+    return dev;
+}
+
+void dev_busy(struct dev_obj *dev, uint8 busy, uint8 set)
+{
+    uint32 flag = disable_irq();
+    if (set) {
+        dev->busy |= busy;
+    } else {
+        dev->busy &= ~ busy;
+    }
+    enable_irq(flag);
+}
+
+__init int32 dev_register(uint32 dev_id, struct dev_obj *device)
+{
+    struct dev_obj *dev = dev_get(dev_id);
+    if (dev) {
+        return -EEXIST;
+    }
+    device->dev_id = dev_id;
+#ifdef CONFIG_SLEEP
+    os_blklist_init(&device->blklist);
+#endif
+    os_mutex_lock(&s_dev_mgr.mutex, osWaitForever);
+    device->next   = s_dev_mgr.next;
+    s_dev_mgr.next = device;
+    os_mutex_unlock(&s_dev_mgr.mutex);
+    return RET_OK;
+}
+
+int32 dev_unregister(struct dev_obj *device)
+{
+    struct dev_obj *dev = NULL;
+    struct dev_obj *last = NULL;
+
+    os_mutex_lock(&s_dev_mgr.mutex, osWaitForever);
+    dev = s_dev_mgr.next;
+    while (dev) {
+        if (dev == device) {
+            // check first dev
+            if (device == s_dev_mgr.next) {
+                s_dev_mgr.next = device->next;
+            } else {
+                last->next = device->next;
+            }
+#ifdef CONFIG_SLEEP
+            os_blklist_del(&device->blklist);
+#endif
+            break;
+        }
+        last = dev;
+        dev  = dev->next;
+    }
+    os_mutex_unlock(&s_dev_mgr.mutex);
+    return RET_OK;
+}
+
+#ifdef CONFIG_SLEEP
+int32 dev_suspended(struct dev_obj *dev, uint8 suspend)
+{
+    if (dev->suspend && suspend && !__in_interrupt()) { /* 非中断上下文，直接挂起当前task */
+        os_blklist_suspend(&dev->blklist, NULL);
+    }
+    return dev->suspend;
+}
+
+__weak int32 dev_suspend_hook(struct dev_obj *dev, uint16 type)
+{
+    return 1;
+}
+int32 dev_suspend(uint16 type)
+{
+    int32 loop;
+    struct dev_obj *dev = NULL;
+
+    os_mutex_lock(&s_dev_mgr.mutex, osWaitForever);
+    dev = s_dev_mgr.next;
+    while (dev) {
+        if (dev->ops && dev->ops->suspend && !dev->suspend) {
+            if (dev_suspend_hook(dev, type)) {
+                loop = 0;
+                dev->suspend = 1;
+                while (dev->busy) {
+                    os_sleep_ms(1);
+                    if (loop++ > 100) {
+                        loop = 0;
+                        os_printf(KERN_WARNING"device %d busy !!!!\r\n", dev->dev_id);
+                    }
+                }
+                dev->ops->suspend(dev);
+            }
+        }
+        dev = dev->next;
+    }
+    os_mutex_unlock(&s_dev_mgr.mutex);
+    return RET_OK;
+}
+
+__weak int32 dev_resume_hook(struct dev_obj *dev, uint16 type, uint32 wkreason)
+{
+    return 1;
+}
+int32 dev_resume(uint16 type, uint32 wkreason)
+{
+    struct dev_obj *dev = NULL;
+
+    os_mutex_lock(&s_dev_mgr.mutex, osWaitForever);
+    dev = s_dev_mgr.next;
+    while (dev) {
+        if (dev->ops && dev->ops->resume && dev->suspend) {
+            if (dev_resume_hook(dev, type, wkreason)) {
+                dev->ops->resume(dev);
+                dev->suspend = 0;
+                os_blklist_resume(&dev->blklist);//唤醒所有被挂起的task
+            }
+        }
+        dev = dev->next;
+    }
+    os_mutex_unlock(&s_dev_mgr.mutex);
+    return RET_OK;
+}
+#else
+int32 dev_suspended(struct dev_obj *dev, uint8 suspend)
+{
+    return 0;
+}
+
+__weak int32 dev_suspend_hook(struct dev_obj *dev, uint16 type)
+{
+    return 1;
+}
+int32 dev_suspend(uint16 type)
+{
+    return RET_ERR;
+}
+
+__weak int32 dev_resume_hook(struct dev_obj *dev, uint16 type, uint32 wkreason)
+{
+    return 1;
+}
+int32 dev_resume(uint16 type, uint32 wkreason)
+{
+    return RET_ERR;
+}
+
+#endif
+

sdk/hal/dma.c

@@ -0,0 +1,205 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/dma.h"
+#include <string.h>
+
+int32 dma_pause(struct dma_device *dma, uint32 ch)
+{
+    if (dma && ((const struct dma_hal_ops *)dma->dev.ops)->pause) {
+        return ((const struct dma_hal_ops *)dma->dev.ops)->pause(dma, ch);
+    }
+    return RET_ERR;
+}
+
+int32 dma_resume(struct dma_device *dma, uint32 ch)
+{
+    if (dma && ((const struct dma_hal_ops *)dma->dev.ops)->resume) {
+        return ((const struct dma_hal_ops *)dma->dev.ops)->resume(dma, ch);
+    }
+    return RET_ERR;
+}
+
+#pragma GCC push_options
+#pragma GCC optimize ("O3")
+
+void dma_memcpy(struct dma_device *dma, void *dst, const void *src, uint32 n)
+{
+    uint8 dma_buf[32];
+    uint8_t *s,*d;
+    uint8_t *s1,*d1,*s2,*d2;
+    uint32 addr; 
+    uint32 dst_addr = (uint32)dst >> 24;
+    uint32 src_addr = (uint32)src >> 24;
+
+    struct dma_xfer_data xfer_data;
+    if ((n <= 32) ||
+        ((src_addr == 0x28) || (src_addr == 0x18)) ||
+        ((dst_addr == 0x28) || (dst_addr == 0x18)) )  {
+        memcpy(dst, src, n);
+        return;
+    }
+
+    s1 = (uint8_t *)src;
+    d1 = (uint8_t *)dst;
+    //处理头
+    memcpy(dma_buf, s1, 16);
+
+    s2 = (uint8_t *)src+n-16;
+    d2 = (uint8_t *)dst+n-16;
+    //处理尾
+    memcpy(dma_buf+16, s2, 16);
+
+    n = n - 32;
+    s = (uint8_t *)src+16;
+    d = (uint8_t *)dst+16;
+
+    xfer_data.dest              = (uint32)d;
+    xfer_data.src               = (uint32)s;
+    xfer_data.element_per_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+    xfer_data.element_num       = n;
+    xfer_data.dir               = ((((uint32)dst) < SRAM_BASE) || (((uint32)src) < SRAM_BASE)) ? DMA_XFER_DIR_M2D : DMA_XFER_DIR_M2M;
+    xfer_data.src_addr_mode     = DMA_XFER_MODE_INCREASE;
+    xfer_data.dst_addr_mode     = DMA_XFER_MODE_INCREASE;
+    xfer_data.dst_id            = 0;
+    xfer_data.src_id            = 0;
+    xfer_data.irq_hdl           = NULL;
+    addr = (uint32)s;
+    addr = addr&CACHE_CIR_INV_ADDR_Msk;
+    s = (uint8*)addr;
+    addr = (uint32)d;
+    addr = addr&CACHE_CIR_INV_ADDR_Msk;
+    d = (uint8*)addr;//&CACHE_CIR_INV_ADDR_Msk;
+    sys_dcache_clean_range((void *)s, (int32_t)s2-(int32_t)s);           //sram->psram
+    sys_dcache_clean_invalid_range((void *)d, (int32_t)d2-(int32_t)d);  //psram cache invalid  //最后一行可能没有无效化  
+
+//    xfer_data.irq_data          = 0;
+    ((const struct dma_hal_ops *)dma->dev.ops)->xfer(dma, &xfer_data);
+    sys_dcache_invalid_range((void *)d, (int32_t)d2-(int32_t)d);
+
+    //处理头
+    memcpy(d1, dma_buf, 16);
+    //处理尾
+    memcpy(d2, dma_buf+16, 16);
+}
+
+
+void dma_memset(struct dma_device *dma, void *dst, uint8 c, uint32 n)
+{
+    uint8 val = c;
+    uint8_t *d,*d1,*d2;
+    uint32_t i = 0;
+    uint32 addr;
+
+    if(n <= 32){
+        d1 = (uint8_t *)dst;
+        for(i = 0;i < n;i++){
+            d1[i] = val;
+        }
+        return;
+    }   
+    
+    d1 = (uint8_t *)dst;
+    d2 = (uint8_t *)dst+n-16;
+
+
+    n = n - 32;
+    d = (uint8_t *)dst+16;
+
+
+    ASSERT(dma && ((const struct dma_hal_ops *)dma->dev.ops)->xfer);
+    struct dma_xfer_data xfer_data;
+    xfer_data.dest              = (uint32)d;
+    xfer_data.src               = (uint32)&val;
+    xfer_data.element_per_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+    xfer_data.element_num       = n;
+    xfer_data.dir               = (((uint32)dst) < SRAM_BASE) ? DMA_XFER_DIR_M2D : DMA_XFER_DIR_M2M;
+    xfer_data.src_addr_mode     = DMA_XFER_MODE_RECYCLE;
+    xfer_data.dst_addr_mode     = DMA_XFER_MODE_INCREASE;
+    xfer_data.dst_id            = 0;
+    xfer_data.src_id            = 0;
+    xfer_data.irq_hdl           = NULL;
+    //    xfer_data.irq_data          = 0;
+
+    addr = (uint32)d;
+    addr = addr&CACHE_CIR_INV_ADDR_Msk;
+    d = (uint8*)addr;//&CACHE_CIR_INV_ADDR_Msk; 
+    sys_dcache_clean_invalid_range((void *)d, (int32_t)d2-(int32_t)d);
+
+    ((const struct dma_hal_ops *)dma->dev.ops)->xfer(dma, &xfer_data);
+    sys_dcache_invalid_range((void *)d, (int32_t)d2-(int32_t)d);
+
+    
+    for(i = 0;i < 16;i++){        //处理头
+        d1[i] = val;
+    }
+    for(i = 0;i < 16;i++){        //处理尾
+        d2[i] = val;
+    }    
+}
+#pragma GCC pop_options
+
+#if ((defined(TXW81X)))
+void dma_blkcpy(struct dma_device *dma , struct dma_blkcpy_cfg *cfg)
+{
+    ASSERT(dma && ((const struct dma_hal_ops *)dma->dev.ops)->xfer);
+    ASSERT(cfg->blk_width <= cfg->src_width);
+    ASSERT(cfg->blk_width <= cfg->dst_width);
+    struct dma_xfer_data xfer_data;
+    xfer_data.dest              = (uint32)cfg->dest;
+    xfer_data.src               = (uint32)cfg->src;
+    xfer_data.element_per_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
+    xfer_data.element_num       = cfg->src_width * cfg->blk_height;
+    xfer_data.dir               = (((uint32)cfg->dest) < SRAM_BASE) ? DMA_XFER_DIR_M2D : DMA_XFER_DIR_M2M;
+    xfer_data.src_addr_mode     = DMA_XFER_MODE_BLKCPY;
+    xfer_data.dst_addr_mode     = DMA_XFER_MODE_BLKCPY;
+    xfer_data.dst_id            = 0;
+    xfer_data.src_id            = 0;
+    xfer_data.blk_width         = cfg->blk_width;
+    xfer_data.blk_height        = cfg->blk_height;
+    xfer_data.src_width         = cfg->src_width;
+    xfer_data.dst_width         = cfg->dst_width;
+    xfer_data.irq_hdl           = NULL;
+//    xfer_data.irq_data          = 0;
+
+    sys_dcache_clean_range((void *)cfg->src,  cfg->src_width * cfg->blk_height);
+
+    sys_dcache_clean_invalid_range((void *)cfg->dest, cfg->dst_width * cfg->blk_height);
+    ((const struct dma_hal_ops *)dma->dev.ops)->xfer(dma, &xfer_data);
+    sys_dcache_invalid_range((void *)cfg->dest, cfg->dst_width * cfg->blk_height);
+    
+}
+#endif
+
+int32 dma_xfer(struct dma_device *dma, struct dma_xfer_data *data)
+{
+    if (dma && ((const struct dma_hal_ops *)dma->dev.ops)->xfer) {
+        return ((const struct dma_hal_ops *)dma->dev.ops)->xfer(dma, data);
+    }
+    return RET_ERR;
+}
+
+int32 dma_status(struct dma_device *dma, uint32 ch)
+{
+    if (dma && ((const struct dma_hal_ops *)dma->dev.ops)->get_status) {
+        return ((const struct dma_hal_ops *)dma->dev.ops)->get_status(dma, ch);
+    }
+    return RET_ERR;
+}
+
+int32 dma_stop(struct dma_device *dma, uint32 ch)
+{
+    if (dma && ((const struct dma_hal_ops *)dma->dev.ops)->stop) {
+        return ((const struct dma_hal_ops *)dma->dev.ops)->stop(dma, ch);
+    }
+    return RET_ERR;
+}
+
+int32 dma_ioctl(struct dma_device *dma, uint32 cmd, int32 param1, int32 param2)
+{
+    if (dma && ((const struct dma_hal_ops *)dma->dev.ops)->ioctl) {
+        return ((const struct dma_hal_ops *)dma->dev.ops)->ioctl(dma, cmd, param1, param2);
+    }
+    return RET_ERR;
+}

sdk/hal/dvp.c

@@ -0,0 +1,215 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/dvp.h"
+
+int32 dvp_open(struct dvp_device *p_dvp)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->open) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->open(p_dvp);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_close(struct dvp_device *p_dvp)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->close) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->close(p_dvp);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_suspend(struct dvp_device *p_dvp)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->suspend) {
+		return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->suspend(p_dvp);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_resume(struct dvp_device *p_dvp)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->resume) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->resume(p_dvp);
+    }
+    return RET_ERR;
+}
+
+
+int32 dvp_init(struct dvp_device *p_dvp)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->init) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->init(p_dvp);
+    }
+    return RET_ERR;
+}
+
+
+int32 dvp_set_baudrate(struct dvp_device *p_dvp, uint32 mclk)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->baudrate) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->baudrate(p_dvp, mclk);
+    }
+    return RET_ERR;
+
+}
+
+int32 dvp_set_size(struct dvp_device *p_dvp, uint32 x_s, uint32 y_s, uint32 x_e, uint32 y_e)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        uint32 size_array[4] = {x_s, y_s, x_e, y_e};
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_SIZE, (uint32)size_array, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_set_addr1(struct dvp_device *p_dvp, uint32 yuv_addr)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_ADR_1, yuv_addr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_set_addr2(struct dvp_device *p_dvp, uint32 yuv_addr)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_ADR_2, yuv_addr, 0);
+    }
+    return RET_ERR;
+}
+
+
+int32 dvp_set_rgb2yuv(struct dvp_device *p_dvp, uint8 en)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_RGB_2_YUV, en, 0);
+    }
+    return RET_ERR;
+
+}
+
+int32 dvp_set_exchange_d5_d6(struct dvp_device *p_dvp, uint8 en)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_EX_D5_D6, en, 0);
+    }
+    return RET_ERR;
+
+}
+
+int32 dvp_set_format(struct dvp_device *p_dvp, uint8 format)      ///*
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_FORMAT, format, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_set_half_size(struct dvp_device *p_dvp, uint8 en)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_SCEN, en, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_set_vsync_polarity(struct dvp_device *p_dvp, uint8 high_valid)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_VSYNC_VAILD, high_valid, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_set_hsync_polarity(struct dvp_device *p_dvp, uint8 high_valid)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_HSYNC_VAILD, high_valid, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_set_once_sampling(struct dvp_device *p_dvp, uint8 en)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_ONE_SAMPLE, en, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_debounce_enable(struct dvp_device *p_dvp, uint8 en, uint8 pixel)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_DEBOUNCE, en, pixel);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_set_ycbcr(struct dvp_device *p_dvp, uint8 mode)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_YCBCR_MODE, mode, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_unload_uv(struct dvp_device *p_dvp, uint8 en)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_DIS_UV_MODE, en, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_frame_load_precent(struct dvp_device *p_dvp, uint8 precent)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_FRAME_RATE, precent, 0);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_low_high_threshold(struct dvp_device *p_dvp, bool low_high)
+{
+    uint32 dlt, dht;
+    if (low_high == 0) {
+        dlt = 0x00000030;
+        dht = 0x00ffffA0;
+    } else {
+        dht = 0x00ffffff;
+        dlt = 0;
+    }
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_THRESHOLD, dlt, dht);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_jpeg_mode_set_len(struct dvp_device *p_dvp, uint32 len)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->ioctl(p_dvp, DVP_IOCTL_CMD_SET_JPEG_LEN, len, 0);
+    }
+    return RET_ERR;
+
+}
+
+int32 dvp_request_irq(struct dvp_device *p_dvp, uint32 irq_flags, dvp_irq_hdl irq_hdl, uint32 irq_data)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->request_irq) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->request_irq(p_dvp, irq_flags, irq_hdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 dvp_release_irq(struct dvp_device *p_dvp, uint32 irq_flags)
+{
+    if (p_dvp && ((const struct dvp_hal_ops *)p_dvp->dev.ops)->release_irq) {
+        return ((const struct dvp_hal_ops *)p_dvp->dev.ops)->release_irq(p_dvp, irq_flags);
+    }
+    return RET_ERR;
+}
+

sdk/hal/gpio.c

@@ -0,0 +1,188 @@
+/**
+  ******************************************************************************
+  * @file       sdk/hal/gpio.h
+  * @author     HUGE-IC Application Team
+  * @version    V1.0.0
+  * @date       2022-01-11
+  * @brief      This file contains all the GPIO HAL functions.
+  * @copyright  Copyright (c) 2016-2022 HUGE-IC
+  ******************************************************************************
+  * @attention
+  * None
+  * 
+  *
+  *
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "typesdef.h"
+#include "errno.h"
+#include "list.h"
+#include "dev.h"
+#include "hal/gpio.h"
+
+/** @defgroup Docxygenid_GPIO_Driver GPIO Driver
+  * @brief    Mainly the driver part of the GPIO module
+  * @{
+  */
+
+
+/** @defgroup Docxygenid_GPIO_function GPIO function
+  * @ingroup  Docxygenid_GPIO_Driver
+  * @brief    GPIO Initialization And Configuration function
+  * @{
+  */
+
+
+/** 
+  * @brief  Set the gpio pin mode.
+  * @param  pin   : which pin to set.\n
+  *                 This parameter can be Px_y where x can be (A..C) and y can be (0..15)\n
+  *                 But the value of the y only be (0..5) when x is C.
+  * @param  mode  : Configure gpio_pin_mode, reference @ref gpio_pin_mode.
+  * @param  level : Configure gpio_pull_level, reference @ref gpio_private_pull_level.
+  * @return
+  *         - RET_OK  : GPIO set mode successfully.
+  *         - RET_ERR : GPIO set mode unsuccessfully.
+  */
+int32 gpio_set_mode(uint32 pin, enum gpio_pin_mode mode, enum gpio_pull_level level)
+{
+    struct gpio_device *gpio = gpio_get(pin);
+    if (gpio && ((const struct gpio_hal_ops *)gpio->dev.ops)->mode) {
+        return ((const struct gpio_hal_ops *)gpio->dev.ops)->mode(gpio, pin, mode, level);
+    }
+
+    return RET_ERR;
+}
+
+/** 
+  * @brief  Set the gpio pin direction.
+  * @param  pin       : which pin to set.\n
+  *                     This parameter can be Px_y where x can be (A..C) and y can be (0..15)\n
+  *                     But the value of the y only be (0..5) when x is C.
+  * @param  direction : Configure gpio pin direction, reference @ref gpio_pin_direction.
+  * @return
+  *         - RET_OK  : GPIO set direction successfully.
+  *         - RET_ERR : GPIO set direction unsuccessfully.
+  */
+int32 gpio_set_dir(uint32 pin, enum gpio_pin_direction direction)
+{
+    struct gpio_device *gpio = gpio_get(pin);
+    if (gpio && ((const struct gpio_hal_ops *)gpio->dev.ops)->dir) {
+        return ((const struct gpio_hal_ops *)gpio->dev.ops)->dir(gpio, pin, direction);
+    }
+    return RET_ERR;
+}
+
+
+/** 
+  * @brief  Set the gpio pin value.
+  * @param  pin       : which pin to set.\n
+  *                     This parameter can be Px_y where x can be (A..C) and y can be (0..15)\n
+  *                     But the value of the y only be (0..5) when x is C.
+  * @param  direction : Configure gpio pin value, it can be 0 / 1.
+  * @return
+  *         - RET_OK  : GPIO pin set value successfully.
+  *         - RET_ERR : GPIO pin set value unsuccessfully.
+  */
+int32 gpio_set_val(uint32 pin, int32 value)
+{
+    struct gpio_device *gpio = gpio_get(pin);
+    if (gpio && ((const struct gpio_hal_ops *)gpio->dev.ops)->set) {
+        return ((const struct gpio_hal_ops *)gpio->dev.ops)->set(gpio, pin, value);
+    }
+    return RET_ERR;
+}
+
+
+/** 
+  * @brief  Get the gpio pin value.
+  * @param  pin       : which pin to set.\n
+  *                     This parameter can be Px_y where x can be (A..C) and y can be (0..15)\n
+  *                     But the value of the y only be (0..5) when x is C.
+  * @return
+  *         - value   : GPIO pin value, it can be 0 / 1.
+  *         - RET_ERR : Get gpio pin value unsuccessfully.
+  */
+int32 gpio_get_val(uint32 pin)
+{
+    struct gpio_device *gpio = gpio_get(pin);
+    if (gpio && ((const struct gpio_hal_ops *)gpio->dev.ops)->get) {
+        return ((const struct gpio_hal_ops *)gpio->dev.ops)->get(gpio, pin);
+    }
+    return RET_ERR;
+}
+
+
+/** 
+  * @brief  Request the gpio pin interrupt.
+  * @param  pin       : which pin to set.\n
+  *                     This parameter can be Px_y where x can be (A..C) and y can be (0..15)\n
+  *                     But the value of the y only be (0..5) when x is C.
+  * @handler          : Interrupt handle, executed after the interrupt is generated.
+  * @data             : Parameters for interrupt handler.
+  * @evt              : Interrupt type, reference @ref gpio_irq_event.
+  * @return
+  *         - RET_OK  : GPIO request pin interrupt successfully.
+  *         - RET_ERR : GPIO request pin interrupt unsuccessfully.
+  */
+int32 gpio_request_pin_irq(uint32 pin, gpio_irq_hdl handler, uint32 data, enum gpio_irq_event evt)
+{
+    struct gpio_device *gpio = gpio_get(pin);
+    if (gpio && ((const struct gpio_hal_ops *)gpio->dev.ops)->request_pin_irq) {
+        return ((const struct gpio_hal_ops *)gpio->dev.ops)->request_pin_irq(gpio, pin, handler, data, evt);
+    }
+    return RET_ERR;
+}
+
+
+/** 
+  * @brief  Release the gpio pin interrupt.
+  * @param  pin       : which pin to set.\n
+  *                     This parameter can be Px_y where x can be (A..C) and y can be (0..15)\n
+  *                     But the value of the y only be (0..5) when x is C.
+  * @evt              : Interrupt type, reference @ref gpio_irq_event.
+  * @return
+  *         - RET_OK  : GPIO release pin interrupt successfully.
+  *         - RET_ERR : GPIO release pin interrupt unsuccessfully.
+  */
+int32 gpio_release_pin_irq(uint32 pin, enum gpio_irq_event evt)
+{
+    struct gpio_device *gpio = gpio_get(pin);
+    if (gpio && ((const struct gpio_hal_ops *)gpio->dev.ops)->release_pin_irq) {
+        return ((const struct gpio_hal_ops *)gpio->dev.ops)->release_pin_irq(gpio, pin, evt);
+    }
+    return RET_ERR;
+}
+
+
+/** 
+  * @brief  Configure the GPIO module by ioctl_cmd.
+  * @param  pin       : which pin to set.\n
+  *                     This parameter can be Px_y where x can be (A..C) and y can be (0..15)\n
+  *                     But the value of the y only be (0..5) when x is C.
+  * @cmd              : Commands to configure the GPIO module, reference @ref gpio_ioctl_cmd.
+  * @param1           : Parameter 1, according to the command.
+  * @param2           : Parameter 2, according to the command.
+  * @return
+  *         - RET_OK  : GPIO module configure successfully.
+  *         - RET_ERR : GPIO module configure unsuccessfully.
+  */
+int32 gpio_ioctl(uint32 pin, int32 cmd, int32 param1, int32 param2)
+{
+    struct gpio_device *gpio = gpio_get(pin);
+    if (gpio && ((const struct gpio_hal_ops *)gpio->dev.ops)->ioctl) {
+        return ((const struct gpio_hal_ops *)gpio->dev.ops)->ioctl(gpio, pin, cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+
+/** @} Docxygenid_GPIO_functions*/
+/** @} Docxygenid_GPIO_Driver*/
+
+
+
+/*************************** (C) COPYRIGHT 2016-2022 HUGE-IC ***** END OF FILE *****/

sdk/hal/i2c.c

@@ -0,0 +1,115 @@
+/**
+  ******************************************************************************
+  * @file    User/xxx.c
+  * @author  HUGE-IC Application Team
+  * @version V1.0.0
+  * @date    01-08-2018
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2018 HUGE-IC</center></h2>
+  *
+  *
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/i2c.h"
+
+/** @addtogroup Template_Project
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+int32 i2c_open(struct i2c_device *i2c, enum i2c_mode mode, enum i2c_addr_mode addr_mode, uint32 addr)
+{
+    if (i2c) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->open(i2c, mode, addr_mode, addr);
+    }
+    return RET_ERR;
+}
+
+int32 i2c_close(struct i2c_device *i2c)
+{
+    if (i2c) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->close(i2c);
+    }
+    return RET_ERR;
+}
+
+int32 i2c_set_baudrate(struct i2c_device *i2c, uint32 baudrate)
+{
+    if (i2c) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->baudrate(i2c, baudrate);
+    }
+
+    return RET_ERR;
+}
+
+int32 i2c_ioctl(struct i2c_device *i2c, uint32 cmd, uint32 param)
+{
+    if (i2c && ((const struct i2c_hal_ops *)i2c->dev.ops)->ioctl) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->ioctl(i2c, cmd, param);
+    }
+    return RET_ERR;
+}
+
+int32 i2c_read(struct i2c_device *i2c, int8 *addr, uint32 addr_len, int8 *buf, uint32 buf_len)
+{
+    if (i2c && ((const struct i2c_hal_ops *)i2c->dev.ops)->read) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->read(i2c, addr, addr_len, buf, buf_len);
+    }
+    return RET_ERR;
+}
+
+int32 i2c_write(struct i2c_device *i2c, int8 *addr, uint32 addr_len, int8 *buf, uint32 buf_len)
+{
+    if (i2c && ((const struct i2c_hal_ops *)i2c->dev.ops)->write) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->write(i2c, addr, addr_len, buf, buf_len);
+    }
+    return RET_ERR;
+}
+
+int32 i2c_write_scatter(struct i2c_device *i2c, int8 *addr, uint32 addr_len, scatter_data *data, uint32 count)
+{
+    if (i2c && ((const struct i2c_hal_ops *)i2c->dev.ops)->write_scatter) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->write_scatter(i2c, addr, addr_len, data, count);
+    }
+    return RET_ERR;
+}
+
+int32 i2c_request_irq(struct i2c_device *i2c, i2c_irq_hdl handle, uint32 irq_data, uint32 irq_flag)
+{
+    if (i2c && ((const struct i2c_hal_ops *)i2c->dev.ops)->request_irq) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->request_irq(i2c, handle, irq_data, irq_flag);
+    }
+    return RET_ERR;
+}
+
+int32 i2c_release_irq(struct i2c_device *i2c, uint32 irq_flag)
+{
+    if (i2c && ((const struct i2c_hal_ops *)i2c->dev.ops)->release_irq) {
+        return ((const struct i2c_hal_ops *)i2c->dev.ops)->release_irq(i2c, irq_flag);
+    }
+    return RET_ERR;
+}
+
+
+/**
+  * @}
+  */
+
+/*************************** (C) COPYRIGHT 2018 HUGE-IC ***** END OF FILE *****/

sdk/hal/i2s.c

@@ -0,0 +1,70 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/i2s.h"
+
+int32 i2s_open(struct i2s_device *i2s, enum i2s_mode mode, enum i2s_sample_freq frequency, enum i2s_sample_bits bits)
+{
+    if (i2s) {
+        return ((const struct i2s_hal_ops *)i2s->dev.ops)->open(i2s, mode, frequency, bits);
+    }
+    return RET_ERR;
+}
+
+int32 i2s_close(struct i2s_device *i2s)
+{
+    if (i2s) {
+        return ((const struct i2s_hal_ops *)i2s->dev.ops)->close(i2s);
+    }
+    return RET_ERR;
+}
+
+int32 i2s_write(struct i2s_device *i2s, const void *buf, uint32 len)
+{
+    if (i2s && ((const struct i2s_hal_ops *)i2s->dev.ops)->write) {
+        return ((const struct i2s_hal_ops *)i2s->dev.ops)->write(i2s, buf, len);
+    }
+    return RET_ERR;
+}
+
+int32 i2s_write_scatter(struct i2s_device *i2s, const scatter_data *data, uint32 count)
+{
+    if (i2s && ((const struct i2s_hal_ops *)i2s->dev.ops)->write_scatter) {
+        return ((const struct i2s_hal_ops *)i2s->dev.ops)->write_scatter(i2s, data, count);
+    }
+    return RET_ERR;
+}
+
+int32 i2s_read(struct i2s_device *i2s, void *buf, uint32 len)
+{
+    if (i2s && ((const struct i2s_hal_ops *)i2s->dev.ops)->read) {
+        return ((const struct i2s_hal_ops *)i2s->dev.ops)->read(i2s, buf, len);
+    }
+    return RET_ERR;
+}
+
+int32 i2s_ioctl(struct i2s_device *i2s, uint32 cmd, uint32 param)
+{
+    if (i2s && ((const struct i2s_hal_ops *)i2s->dev.ops)->ioctl) {
+        return ((const struct i2s_hal_ops *)i2s->dev.ops)->ioctl(i2s, cmd, param);
+    }
+    return RET_ERR;
+}
+
+int32 i2s_request_irq(struct i2s_device *i2s, uint32 irq_flag, i2s_irq_hdl irqhdl, uint32 irq_data)
+{
+    if (i2s && ((const struct i2s_hal_ops *)i2s->dev.ops)->request_irq) {
+        return ((const struct i2s_hal_ops *)i2s->dev.ops)->request_irq(i2s, irq_flag, irqhdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 i2s_release_irq(struct i2s_device *i2s, uint32 irq_flag)
+{
+    if (i2s && ((const struct i2s_hal_ops *)i2s->dev.ops)->release_irq) {
+        return ((const struct i2s_hal_ops *)i2s->dev.ops)->release_irq(i2s, irq_flag);
+    }
+    return RET_ERR;
+}
+

sdk/hal/jpeg.c

@@ -0,0 +1,172 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/jpeg.h"
+
+int32 jpg_open(struct jpg_device *p_jpg)
+{
+    if(p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->open) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->open(p_jpg);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_close(struct jpg_device *p_jpg)
+{
+    if(p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->close) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->close(p_jpg);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_init(struct jpg_device *p_jpg, uint32 table_idx, uint32 qt)
+{
+    if(p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->init) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->init(p_jpg, table_idx, qt);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_suspend(struct jpg_device *p_jpg)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->suspend) {
+		return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->suspend(p_jpg);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_resume(struct jpg_device *p_jpg)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->resume) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->resume(p_jpg);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_is_online(struct jpg_device *p_jpg)
+{
+	if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl)
+	    return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_IS_ONLINE, 0, 0);
+	return RET_ERR;
+}
+
+int32 jpg_set_init_finish(struct jpg_device *p_jpg,uint32_t value)
+{
+	if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl)
+    	return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_SET_INIT_FINISH, value, 0);
+	return RET_ERR;
+}
+
+int32 jpg_get_init_flag(struct jpg_device *p_jpg)
+{
+	if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl)
+    	return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_GET_INIT_FLAG, 0, 0);
+	return RET_ERR;
+}
+
+int32 jpg_set_data_from(struct jpg_device *p_jpg, uint8 src_from)
+{
+	if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl)
+    	return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_SET_SRC_FROM, src_from, 0);
+	return RET_ERR;
+}
+
+
+
+int32 jpg_set_size(struct jpg_device *p_jpg, uint32 h, uint32 w)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_SET_SIZE, h, w);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_set_hw_check(struct jpg_device *p_jpg, uint8 enable)
+{
+	if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl)
+		return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_HW_CHK, enable, 0);
+	return RET_ERR;
+}
+
+int32 jpg_open_debug(struct jpg_device *p_jpg, uint8 enable)
+{
+	if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl)
+	    return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_OPEN_DBG, enable, 0);
+	return RET_ERR;
+}
+
+int32 jpg_soft_kick(struct jpg_device *p_jpg, uint8 kick)
+{
+	if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl)
+	    return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_SOFT_KICK, kick, 0);
+	return RET_ERR;
+}
+
+int32 jpg_updata_dqt(struct jpg_device *p_jpg, uint32 *dqtbuf)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_UPDATE_QT, (uint32)dqtbuf, 0);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_set_addr(struct jpg_device *p_jpg, uint32 addr, uint32 len)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_SET_ADR, addr, len);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_set_qt(struct jpg_device *p_jpg, uint32 qt)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_SET_QT, qt, 0);
+    }
+    return RET_ERR;
+}
+
+
+int32 jpg_decode_target(struct jpg_device *p_jpg, uint8 to_scaler)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_DECODE_TAG, to_scaler, 0);
+    }
+    return RET_ERR;
+}
+
+
+int32 jpg_is_idle(struct jpg_device *p_jpg)
+{
+	if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl)
+	    return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->ioctl(p_jpg, JPG_IOCTL_CMD_IS_IDLE, 0, 0);
+	return RET_ERR;
+}
+
+int32 jpg_decode_photo(struct jpg_device *p_jpg, uint32 photo)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->decode) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->decode(p_jpg, photo);
+    }
+    return RET_ERR;
+}
+
+
+int32 jpg_request_irq(struct jpg_device *p_jpg, jpg_irq_hdl isr, uint32 irq, void *dev_id)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->request_irq) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->request_irq(p_jpg, isr, irq, (uint32)dev_id);
+    }
+    return RET_ERR;
+}
+
+int32 jpg_release_irq(struct jpg_device *p_jpg, uint32 irq_flags)
+{
+    if (p_jpg && ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->release_irq) {
+        return ((const struct jpeg_hal_ops *)p_jpg->dev.ops)->release_irq(p_jpg, irq_flags);
+    }
+    return RET_ERR;
+}
+

sdk/hal/lcdc.c

@@ -0,0 +1,640 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/lcdc.h"
+
+int32 lcdc_init(struct lcdc_device *p_lcdc)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->init) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->init(p_lcdc);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_open(struct lcdc_device *p_lcdc)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->open) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->open(p_lcdc);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_close(struct lcdc_device *p_lcdc)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->close) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->close(p_lcdc);
+    }
+    return RET_ERR;
+}
+
+
+int32 lcdc_suspend(struct lcdc_device *p_lcdc)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->suspend) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->suspend(p_lcdc);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_resume(struct lcdc_device *p_lcdc)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->resume) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->resume(p_lcdc);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_request_irq(struct lcdc_device *p_lcdc, uint32 irq_flags, lcdc_irq_hdl irq_hdl, uint32 irq_data)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->request_irq) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->request_irq(p_lcdc, irq_flags, irq_hdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_release_irq(struct lcdc_device *p_lcdc, uint32 irq_flags)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->release_irq) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->release_irq(p_lcdc, irq_flags);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_baudrate(struct lcdc_device *p_lcdc, uint32 mclk)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->baudrate) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->baudrate(p_lcdc, mclk);
+    }
+    return RET_ERR;
+
+}
+
+int32 lcdc_set_color_mode(struct lcdc_device *p_lcdc, enum lcdc_color_mode cm)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_COLOR_MODE, cm, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_bus_width(struct lcdc_device *p_lcdc, enum lcdc_bus_width bw)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_BUS_MODE, bw, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_interface(struct lcdc_device *p_lcdc, enum lcdc_interface_mode im)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_INTERFACE_MODE, im, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_colrarray(struct lcdc_device *p_lcdc, uint8 colrarray)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_COLRARRAY, colrarray, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_p0p1_enable(struct lcdc_device *p_lcdc, uint8 p0_en,uint8 p1_en){
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_ROTATE_P0_P1_EN, p0_en, p1_en);
+	}
+	return RET_ERR;
+
+}
+
+int32 lcdc_set_lcd_vaild_size(struct lcdc_device *p_lcdc, uint32 w,uint32 h,uint8 pixel_dot_num)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_LCD_VAILD_SIZE, (w<<16)|h, pixel_dot_num);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_lcd_visible_size(struct lcdc_device *p_lcdc, uint32 w,uint32 h,uint8 pixel_dot_num)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_LCD_VISIBLE_SIZE, (w<<16)|h, pixel_dot_num);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_signal_config(struct lcdc_device *p_lcdc, uint8 vs_en,uint8 hs_en,uint8 de_en,uint8 vs_inv,uint8 hs_inv,uint8 de_inv,uint8 clk_inv)
+{
+	uint8 arg = 0;
+	arg  =  (  vs_en<<(0));
+	arg  |= (  hs_en<<(1));
+	arg  |= (  de_en<<(2));
+	arg  |= ( vs_inv<<(3));
+	arg  |= ( hs_inv<<(4));
+	arg  |= ( de_inv<<(5));
+	arg  |= (clk_inv<<(6));
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_SIGNAL_CONFIG, arg, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 lcdc_mcu_signal_config(struct lcdc_device *p_lcdc, uint8 value)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_MCU_SIGNAL_CONFIG, value, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_set_invalid_line(struct lcdc_device *p_lcdc, uint8 invalid_line)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_INVALID_LINE, invalid_line, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_valid_dot(struct lcdc_device *p_lcdc, uint32 w_start,uint32 h_start)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_VALID_DOT, w_start, h_start);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_hlw_vlw(struct lcdc_device *p_lcdc, uint32 hlw,uint32 vlw)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_HLW_VLW, hlw, vlw);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_bigendian(struct lcdc_device *p_lcdc, uint8 en)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_VIDEO_BIG_ENDIAN, en, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_video_size(struct lcdc_device *p_lcdc, uint32 w,uint32 h)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_VIDEO_SIZE, w, h);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_p0_rotate_y_src_addr(struct lcdc_device *p_lcdc, uint32 yaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_P0_ROTATE_Y_SRC_ADDR, yaddr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_p0_rotate_u_src_addr(struct lcdc_device *p_lcdc, uint32 uaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_P0_ROTATE_U_SRC_ADDR, uaddr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_p0_rotate_v_src_addr(struct lcdc_device *p_lcdc, uint32 vaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_P0_ROTATE_V_SRC_ADDR, vaddr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_p1_rotate_y_src_addr(struct lcdc_device *p_lcdc, uint32 yaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_P1_ROTATE_Y_SRC_ADDR, yaddr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_p1_rotate_u_src_addr(struct lcdc_device *p_lcdc, uint32 uaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_P1_ROTATE_U_SRC_ADDR, uaddr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_p1_rotate_v_src_addr(struct lcdc_device *p_lcdc, uint32 vaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_P1_ROTATE_V_SRC_ADDR, vaddr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_rotate_p0_up(struct lcdc_device *p_lcdc, uint8 en)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_ROTATE_P0_UP, en, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_rotate_p0p1_start_location(struct lcdc_device *p_lcdc, uint32 x0,uint32 y0,uint32 x1,uint32 y1)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_P0P1_ROTATE_START_ADDR, (y0<<16)|x0, (y1<<16)|x1);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_set_rotate_linebuf_num(struct lcdc_device *p_lcdc, uint32 linebuf)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_ROTATE_LINE_BUF_NUM, linebuf, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_rotate_linebuf_y_addr(struct lcdc_device *p_lcdc, uint32 yaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_ROTATE_LINE_BUF_Y, yaddr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_rotate_linebuf_u_addr(struct lcdc_device *p_lcdc, uint32 uaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_ROTATE_LINE_BUF_U, uaddr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_rotate_linebuf_v_addr(struct lcdc_device *p_lcdc, uint32 vaddr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_ROTATE_LINE_BUF_V, vaddr, 0);
+    }
+    return RET_ERR;
+}
+
+
+int32 lcdc_set_rotate_mirror(struct lcdc_device *p_lcdc, uint8 mirror,enum lcdc_rotate_mode rotate)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_ROTATE_MIRROR, mirror, rotate);
+    }
+    return RET_ERR;
+} 
+
+int32 lcdc_set_rotate_p0p1_size(struct lcdc_device *p_lcdc, uint32 w0,uint32 h0,uint32 w1,uint32 h1)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_ROTATE_SET_SIZE, (w0<<16)|h0, (w1<<16)|h1);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_video_data_from(struct lcdc_device *p_lcdc, enum lcdc_video_mode vm)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_VIDEO_MODE, vm, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_set_video_start_location(struct lcdc_device *p_lcdc, uint32 x,uint32 y)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_VIDEO_START_ADDR, (y<<16)|x, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_video_en(struct lcdc_device *p_lcdc, uint8 en)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_VIDEO_EN, en, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_size(struct lcdc_device *p_lcdc, uint32 w,uint32 h)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_SIZE, (h<<16)|w, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_start_location(struct lcdc_device *p_lcdc, uint32 x,uint32 y)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_START_ADDR, y, x);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_dma_addr(struct lcdc_device *p_lcdc, uint32 addr)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_DMA_ADDR, addr, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_lut_addr(struct lcdc_device *p_lcdc, uint32 addr)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_LUTDMA_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 lcdc_set_osd_dma_len(struct lcdc_device *p_lcdc, uint32 len)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_DMA_LEN, len, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_format(struct lcdc_device *p_lcdc, enum lcdc_osd_format osd_format)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_FORMAT, osd_format, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_alpha(struct lcdc_device *p_lcdc, uint32 alpha)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_ALPHA, alpha, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_enc_head(struct lcdc_device *p_lcdc, uint32 head, uint32 head_tran)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_ENC_HEAD, head, head_tran);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_enc_diap(struct lcdc_device *p_lcdc, uint32 diap, uint32 diap_tran)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_ENC_DIAP, diap, diap_tran);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_en(struct lcdc_device *p_lcdc, uint8 en)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_EN, en, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_osd_enc_src_addr(struct lcdc_device *p_lcdc, uint32 addr)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_ENC_SRC_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_set_osd_enc_dst_addr(struct lcdc_device *p_lcdc, uint32 addr)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_ENC_DST_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_set_osd_enc_src_len(struct lcdc_device *p_lcdc, uint32 len)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_ENC_SRC_LEN, len, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_get_osd_enc_dst_len(struct lcdc_device *p_lcdc)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_GET_OSD_ENC_DST_LEN, 0, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_osd_enc_start_run(struct lcdc_device *p_lcdc,uint8_t en)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_OSD_ENC_START, en, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_start_run(struct lcdc_device *p_lcdc)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_START_RUN, 0, 0);
+    }
+    return RET_ERR;
+}
+
+
+int32 lcdc_mcu_write_reg(struct lcdc_device *p_lcdc,uint8 data)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_MCU_CPU_WRITE, data, 0);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_mcu_write_data(struct lcdc_device *p_lcdc,uint8 data)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_MCU_CPU_WRITE, data, 1);
+    }
+    return RET_ERR;
+}
+
+
+int32 lcdc_video_enable_gamma_saturation(struct lcdc_device *p_lcdc, uint8 gamma,uint8 saturation)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_GAMMA_SATURATION_EN, gamma, saturation);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_gamma_saturation_val(struct lcdc_device *p_lcdc, uint32 gamma,uint32 saturation)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_GAMMA_SATURATION_VAL, gamma, saturation);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_enable_ccm(struct lcdc_device *p_lcdc, uint8 ccm)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_CCM_EN, ccm, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_enable_auto_ks(struct lcdc_device *p_lcdc, uint8 enable)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_AUTO_KICK_EN, enable,0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_set_timeout_info(struct lcdc_device *p_lcdc, uint8 enable,uint8 timeout)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_TIMEOUT_INF, enable,timeout);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_mcu_read_data(struct lcdc_device *p_lcdc,uint8 *read_buf,uint8 cmd,uint8 len)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        uint32_t param = cmd << 16 | len;
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_MCU_CPU_READ, (uint32_t)read_buf,param);
+    }
+    return RET_ERR;
+}
+
+int32 lcdc_set_te_edge(struct lcdc_device *p_lcdc,uint8 edge)
+{
+    if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+        uint32_t param = edge;
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_TE_EDGE, param,0);
+    }
+    return RET_ERR;
+}
+
+
+int32 lcdc_video_enable_saturation(struct lcdc_device *p_lcdc, uint8 en)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_SATURATION_EN, en, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_saturation_val(struct lcdc_device *p_lcdc, uint8 val)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_SATURATION_VALUE, val,0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_enable_constarast(struct lcdc_device *p_lcdc, uint8 en)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_CONSTRAST_EN, en, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_constarast_val(struct lcdc_device *p_lcdc, uint8 val)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_CONSTRAST_VALUE, val,0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_enable_gamma(struct lcdc_device *p_lcdc, uint8 en)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_GAMMA_EN, en, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_gamma_R(struct lcdc_device *p_lcdc, uint32 addr)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_GAMMA_R, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_gamma_G(struct lcdc_device *p_lcdc, uint32 addr)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_GAMMA_G, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_gamma_B(struct lcdc_device *p_lcdc, uint32 addr)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_GAMMA_B, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_CCM_COEF0(struct lcdc_device *p_lcdc, uint32 matrix)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_CCM_COEF0, matrix, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_CCM_COEF1(struct lcdc_device *p_lcdc, uint32 matrix)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_CCM_COEF1, matrix, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_CCM_COEF2(struct lcdc_device *p_lcdc, uint32 matrix)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_CCM_COEF2, matrix, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_video_set_CCM_COEF3(struct lcdc_device *p_lcdc, uint32 offset)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_SET_CCM_COEF3, offset, 0);
+	}
+	return RET_ERR;
+}
+
+int32 lcdc_get_con(struct lcdc_device *p_lcdc)
+{
+	if (p_lcdc && ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl) {
+		return ((const struct lcdc_hal_ops *)p_lcdc->dev.ops)->ioctl(p_lcdc, LCDC_GET_CON, 0, 0);
+	}
+	return RET_ERR;
+}

sdk/hal/led.c

@@ -0,0 +1,63 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/led.h"
+
+
+int32 led_open(struct led_device *led, enum led_work_mode work_mode, enum led_seg_cnt seg_cnt, enum led_com_cnt com_cnt)
+{
+    if (led && ((const struct led_hal_ops *)led->dev.ops)->open) {
+        return ((const struct led_hal_ops *)led->dev.ops)->open(led, work_mode, seg_cnt, com_cnt);
+    }
+    return RET_ERR;
+}
+
+int32 led_on(struct led_device *led, uint32 num, enum led_com_cnt pos)
+{
+    if (led && ((const struct led_hal_ops *)led->dev.ops)->on) {
+        return ((const struct led_hal_ops *)led->dev.ops)->on(led, num, pos);
+    }
+    return RET_ERR;
+}
+
+int32 led_off(struct led_device *led, enum led_com_cnt pos)
+{
+    if (led && ((const struct led_hal_ops *)led->dev.ops)->off) {
+        return ((const struct led_hal_ops *)led->dev.ops)->off(led, pos);
+    }
+    return RET_ERR;
+}
+
+int32 led_close(struct led_device *led)
+{
+    if (led && ((const struct led_hal_ops *)led->dev.ops)->close) {
+        return ((const struct led_hal_ops *)led->dev.ops)->close(led);
+    }
+    return RET_ERR;
+}
+
+int32 led_ioctl(struct led_device *led, enum led_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2)
+{
+    if (led && ((const struct led_hal_ops *)led->dev.ops)->ioctl) {
+        return ((const struct led_hal_ops *)led->dev.ops)->ioctl(led, ioctl_cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+int32 led_request_irq(struct led_device *led, enum led_irq_flag irq_flag, led_irq_hdl irq_hdl, uint32 irq_data)
+{
+    if (led && ((const struct led_hal_ops *)led->dev.ops)->request_irq) {
+        return ((const struct led_hal_ops *)led->dev.ops)->request_irq(led, irq_flag, irq_hdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 led_release_irq(struct led_device *led, enum led_irq_flag irq_flag)
+{
+    if (led && ((const struct led_hal_ops *)led->dev.ops)->release_irq) {
+        return ((const struct led_hal_ops *)led->dev.ops)->release_irq(led, irq_flag);
+    }
+    return RET_ERR;
+}
+

sdk/hal/netdev.c

@@ -0,0 +1,63 @@
+#include "typesdef.h"
+#include "errno.h"
+#include "list.h"
+#include "dev.h"
+#include "osal/task.h"
+#include "hal/netdev.h"
+
+int32 netdev_open(struct netdev *ndev, netdev_input_cb input_cb, netdev_event_cb evt_cb, void *priv)
+{
+    if (ndev && ((const struct netdev_hal_ops *)ndev->dev.ops)->open) {
+        return ((const struct netdev_hal_ops *)ndev->dev.ops)->open(ndev, input_cb, evt_cb, priv);
+    }
+    return -EINVAL;
+}
+
+int32 netdev_close(struct netdev *ndev)
+{
+    if (ndev && ((const struct netdev_hal_ops *)ndev->dev.ops)->close) {
+        return ((const struct netdev_hal_ops *)ndev->dev.ops)->close(ndev);
+    }
+    return -EINVAL;
+}
+
+int32 netdev_send_data(struct netdev *ndev, uint8 *p_data, uint32 size)
+{
+    if (ndev && ((const struct netdev_hal_ops *)ndev->dev.ops)->send_data) {
+        return ((const struct netdev_hal_ops *)ndev->dev.ops)->send_data(ndev, p_data, size);
+    }
+    return -ENOTSUPP;
+}
+
+int32 netdev_send_scatter_data(struct netdev *ndev, scatter_data *p_data, uint32 count)
+{
+    if (ndev && ((const struct netdev_hal_ops *)ndev->dev.ops)->send_scatter_data) {
+        return ((const struct netdev_hal_ops *)ndev->dev.ops)->send_scatter_data(ndev, p_data, count);
+    }
+    return -ENOTSUPP;
+}
+
+
+int32 netdev_ioctl(struct netdev *ndev, uint32 cmd, uint32 param1, uint32 param2)
+{
+    if (ndev && ((const struct netdev_hal_ops *)ndev->dev.ops)->ioctl) {
+        return ((const struct netdev_hal_ops *)ndev->dev.ops)->ioctl(ndev, cmd, param1, param2);
+    }
+    return -EINVAL;
+}
+
+void netdev_mdio_write(struct netdev *ndev, uint16 phy_addr, uint16 reg_addr, uint16 data)
+{
+    if (ndev && ((const struct netdev_hal_ops *)ndev->dev.ops)->mdio_write) {
+        ((const struct netdev_hal_ops *)ndev->dev.ops)->mdio_write(ndev, phy_addr, reg_addr, data);
+    }
+}
+
+int32 netdev_mdio_read(struct netdev *ndev, uint16 phy_addr, uint16 reg_addr)
+{
+    if (ndev && ((const struct netdev_hal_ops *)ndev->dev.ops)->mdio_read) {
+        return ((const struct netdev_hal_ops *)ndev->dev.ops)->mdio_read(ndev, phy_addr, reg_addr);
+    }
+    return 0;
+}
+

sdk/hal/of.c

@@ -0,0 +1,64 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/of.h"
+
+
+int32 of_init(struct of_device *p_of)
+{
+    if (p_of && ((const struct of_hal_ops *)p_of->dev.ops)->init) {
+        return ((const struct of_hal_ops *)p_of->dev.ops)->init(p_of);
+    }
+    return RET_ERR;
+}
+
+int32 of_set_instr_mode(struct of_device *p_of,enum of_instr_mode instr_format)
+{
+    if (p_of && ((const struct of_hal_ops *)p_of->dev.ops)->ioctl) {
+        return ((const struct of_hal_ops *)p_of->dev.ops)->ioctl(p_of,OF_INSTR_MODE, instr_format,0);
+    }
+    return RET_ERR;
+}
+
+int32 of_set_pixel_num(struct of_device *p_of,uint32 pixel_num)
+{
+    if (p_of && ((const struct of_hal_ops *)p_of->dev.ops)->ioctl) {
+        return ((const struct of_hal_ops *)p_of->dev.ops)->ioctl(p_of,CAL_PIXEL_NUM, pixel_num,0);
+    }
+    return RET_ERR;
+}
+
+int32 of_set_row_num(struct of_device *p_of,uint32 row_num)
+{
+    if (p_of && ((const struct of_hal_ops *)p_of->dev.ops)->ioctl) {
+        return ((const struct of_hal_ops *)p_of->dev.ops)->ioctl(p_of,CAL_ROW_NUM, row_num,0);
+    }
+    return RET_ERR;
+}
+
+int32 of_set_row_size(struct of_device *p_of,uint32 row_size)
+{
+    if (p_of && ((const struct of_hal_ops *)p_of->dev.ops)->ioctl) {
+        return ((const struct of_hal_ops *)p_of->dev.ops)->ioctl(p_of,SET_ROW_SIZE, row_size,0);
+    }
+    return RET_ERR;
+}
+
+int32 of_set_addr(struct of_device *p_of,uint32 addr0,uint32 addr1)
+{
+    if (p_of && ((const struct of_hal_ops *)p_of->dev.ops)->ioctl) {
+        return ((const struct of_hal_ops *)p_of->dev.ops)->ioctl(p_of,SET_OF_ADDR, addr0,addr1);
+    }
+    return RET_ERR;
+}
+
+int32 of_get_acc(struct of_device *p_of)
+{
+    if (p_of && ((const struct of_hal_ops *)p_of->dev.ops)->ioctl) {
+        return ((const struct of_hal_ops *)p_of->dev.ops)->ioctl(p_of,GET_CAL_ACC, 0,0);
+    }
+    return RET_ERR;
+}
+

sdk/hal/pdm.c

@@ -0,0 +1,54 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/pdm.h"
+
+int32 pdm_open(struct pdm_device *pdm, enum pdm_sample_freq freq, enum pdm_channel channel)
+{
+    if (pdm && ((const struct pdm_hal_ops *)pdm->dev.ops)->open) {
+        return ((const struct pdm_hal_ops *)pdm->dev.ops)->open(pdm, freq, channel);
+    }
+    return RET_ERR;
+}
+
+int32 pdm_read(struct pdm_device *pdm, void *buf, uint32 len)
+{
+    if (pdm && ((const struct pdm_hal_ops *)pdm->dev.ops)->read) {
+        return ((const struct pdm_hal_ops *)pdm->dev.ops)->read(pdm, buf, len);
+    }
+    return RET_ERR;
+}
+
+int32 pdm_close(struct pdm_device *pdm)
+{
+    if (pdm && ((const struct pdm_hal_ops *)pdm->dev.ops)->close) {
+        return ((const struct pdm_hal_ops *)pdm->dev.ops)->close(pdm);
+    }
+    return RET_ERR;
+}
+
+int32 pdm_request_irq(struct pdm_device *pdm, enum pdm_irq_flag flag, pdm_irq_hdl irq_hdl, uint32 data)
+{
+    if (pdm && ((const struct pdm_hal_ops *)pdm->dev.ops)->request_irq) {
+        return ((const struct pdm_hal_ops *)pdm->dev.ops)->request_irq(pdm, flag, irq_hdl, data);
+    }
+    return RET_ERR;
+}
+
+int32 pdm_release_irq(struct pdm_device *pdm, enum pdm_irq_flag irq_flag)
+{
+    if (pdm && ((const struct pdm_hal_ops *)pdm->dev.ops)->release_irq) {
+        return ((const struct pdm_hal_ops *)pdm->dev.ops)->release_irq(pdm, irq_flag);
+    }
+    return RET_ERR;
+}
+
+int32 pdm_ioctl(struct pdm_device *pdm, enum pdm_ioctl_cmd cmd, uint32 param)
+{
+    if (pdm && ((const struct pdm_hal_ops *)pdm->dev.ops)->ioctl) {
+        return ((const struct pdm_hal_ops *)pdm->dev.ops)->ioctl(pdm, cmd, param);
+    }
+    return RET_ERR;
+}
+

sdk/hal/prc.c

@@ -0,0 +1,108 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/prc.h"
+
+
+
+
+int32 prc_set_width(struct prc_device *p_prc, uint32 width)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl(p_prc,PRC_IOCTL_CMD_SET_WIDTH, width,0);
+    }
+    return RET_ERR;
+}
+
+int32 prc_suspend(struct prc_device *p_prc)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->suspend) {
+		return ((const struct prc_hal_ops *)p_prc->dev.ops)->suspend(p_prc);
+    }
+    return RET_ERR;
+}
+
+int32 prc_resume(struct prc_device *p_prc)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->resume) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->resume(p_prc);
+    }
+    return RET_ERR;
+}
+
+
+int32 prc_set_yuv_mode(struct prc_device *p_prc, uint32 mode)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl(p_prc,PRC_IOCTL_CMD_SET_YUV_MODE, mode,0);
+    }
+    return RET_ERR;
+}
+
+int32 prc_set_yaddr(struct prc_device *p_prc, uint32 addr)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl(p_prc,PRC_IOCTL_CMD_SET_Y_ADDR, addr,0);
+    }
+    return RET_ERR;
+}
+
+int32 prc_set_uaddr(struct prc_device *p_prc, uint32 addr)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl(p_prc,PRC_IOCTL_CMD_SET_U_ADDR, addr,0);
+    }
+    return RET_ERR;
+}
+
+int32 prc_set_vaddr(struct prc_device *p_prc, uint32 addr)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl(p_prc,PRC_IOCTL_CMD_SET_V_ADDR, addr,0);
+    }
+    return RET_ERR;
+}
+
+int32 prc_set_src_addr(struct prc_device *p_prc, uint32 addr)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl(p_prc,PRC_IOCTL_CMD_SET_SRC_ADDR, addr,0);
+    }
+    return RET_ERR;
+}
+
+int32 prc_run(struct prc_device *p_prc)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->ioctl(p_prc,PRC_IOCTL_CMD_KICK, 0,0);
+    }
+    return RET_ERR;
+}
+
+int32 prc_init(struct prc_device *p_prc)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->init) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->init(p_prc);
+    }
+    return RET_ERR;
+}
+
+int32 prc_request_irq(struct prc_device *p_prc, uint32 irq_flags, prc_irq_hdl irq_hdl, uint32 irq_data)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->request_irq) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->request_irq(p_prc, irq_flags, irq_hdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 prc_release_irq(struct prc_device *p_prc, uint32 irq_flags)
+{
+    if (p_prc && ((const struct prc_hal_ops *)p_prc->dev.ops)->release_irq) {
+        return ((const struct prc_hal_ops *)p_prc->dev.ops)->release_irq(p_prc, irq_flags);
+    }
+    return RET_ERR;
+}
+
+

sdk/hal/pwm.c

@@ -0,0 +1,79 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/pwm.h"
+
+
+int32 pwm_init(struct pwm_device *pwm, enum pwm_channel channel, uint32 period_sysclkpd_cnt, uint32 h_duty_sysclkpd_cnt)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->init) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->init(pwm, channel, period_sysclkpd_cnt, h_duty_sysclkpd_cnt);
+    }
+    return RET_ERR;
+}
+
+int32 pwm_deinit(struct pwm_device *pwm, enum pwm_channel channel)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->deinit) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->deinit(pwm, channel);
+    }
+    return RET_ERR;
+}
+
+int32 pwm_start(struct pwm_device *pwm, enum pwm_channel channel)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->start) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->start(pwm, channel);
+    }
+    return RET_ERR;
+}
+
+int32 pwm_stop(struct pwm_device *pwm, enum pwm_channel channel)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->stop) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->stop(pwm, channel);
+    }
+    return RET_ERR;
+}
+
+int32 pwm_suspend(struct pwm_device *pwm, enum pwm_channel channel)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->suspend) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->suspend(pwm, channel);
+    }
+    return RET_ERR;
+}
+
+int32 pwm_resume(struct pwm_device *pwm, enum pwm_channel channel)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->resume) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->resume(pwm, channel);
+    }
+    return RET_ERR;
+}
+
+int32 pwm_ioctl(struct pwm_device *pwm, enum pwm_channel channel, enum pwm_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->ioctl) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->ioctl(pwm, channel, ioctl_cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+int32 pwm_request_irq(struct pwm_device *pwm, enum pwm_channel channel, enum pwm_irq_flag irq_flag, pwm_irq_hdl irq_hdl, uint32 data)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->request_irq) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->request_irq(pwm, channel, irq_flag, irq_hdl, data);
+    }
+    return RET_ERR;
+}
+
+int32 pwm_release_irq(struct pwm_device *pwm, enum pwm_channel channel)
+{
+    if (pwm && ((const struct pwm_hal_ops *)pwm->dev.ops)->release_irq) {
+        return ((const struct pwm_hal_ops *)pwm->dev.ops)->release_irq(pwm, channel);
+    }
+    return RET_ERR;
+}
+

sdk/hal/rtc.c

@@ -0,0 +1,71 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/rtc.h"
+
+
+int32 rtc_open(struct rtc_device *rtc, struct rtc_time_type *rtc_time) {
+
+    if(rtc && ((const struct rtc_hal_ops *)rtc->dev.ops)->open) {
+        return ((const struct rtc_hal_ops *)rtc->dev.ops)->open(rtc, rtc_time);
+    }
+
+    return RET_ERR;
+}
+
+int32 rtc_close(struct rtc_device *rtc) {
+
+    if(rtc && ((const struct rtc_hal_ops *)rtc->dev.ops)->close) {
+        return ((const struct rtc_hal_ops *)rtc->dev.ops)->close(rtc);
+    }
+
+    return RET_ERR;
+}
+
+int32 rtc_set_time(struct rtc_device *rtc, struct rtc_time_type *rtc_time) {
+
+    if(rtc && ((const struct rtc_hal_ops *)rtc->dev.ops)->set_time) {
+        return ((const struct rtc_hal_ops *)rtc->dev.ops)->set_time(rtc, rtc_time);
+    }
+
+    return RET_ERR;
+}
+
+int32 rtc_get_time(struct rtc_device *rtc, struct rtc_time_type *rtc_time) {
+
+    if(rtc && ((const struct rtc_hal_ops *)rtc->dev.ops)->get_time) {
+        return ((const struct rtc_hal_ops *)rtc->dev.ops)->get_time(rtc, rtc_time);
+    }
+
+    return RET_ERR;
+}
+
+int32 rtc_ioctl(struct rtc_device *rtc, uint32 cmd, uint32 param1, uint32 param2) {
+
+    if(rtc && ((const struct rtc_hal_ops *)rtc->dev.ops)->ioctl) {
+        return ((const struct rtc_hal_ops *)rtc->dev.ops)->ioctl(rtc, cmd, param1, param2);
+    }
+
+    return RET_ERR;
+}
+
+int32 rtc_request_irq(struct rtc_device *rtc, uint32 irq_flag, rtc_irq_hdl irq_hdl, uint32 irq_data) {
+
+    if(rtc && ((const struct rtc_hal_ops *)rtc->dev.ops)->request_irq) {
+        return ((const struct rtc_hal_ops *)rtc->dev.ops)->request_irq(rtc, irq_flag, irq_hdl, irq_data);
+    }
+
+    return RET_ERR;
+}
+
+int32 rtc_release_irq(struct rtc_device *rtc, uint32 irq_flag) {
+
+    if(rtc && ((const struct rtc_hal_ops *)rtc->dev.ops)->release_irq) {
+        return ((const struct rtc_hal_ops *)rtc->dev.ops)->release_irq(rtc, irq_flag);
+    }
+
+    return RET_ERR;
+}
+
+

sdk/hal/scale.c

@@ -0,0 +1,216 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/scale.h"
+
+
+int32 scale_open(struct scale_device *p_scale)
+{
+    if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->open) {
+        return ((const struct scale_hal_ops *)p_scale->dev.ops)->open(p_scale);
+    }
+    return RET_ERR;
+}
+
+int32 scale_close(struct scale_device *p_scale)
+{
+    if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->close) {
+        return ((const struct scale_hal_ops *)p_scale->dev.ops)->close(p_scale);
+    }
+    return RET_ERR;
+}
+
+int32 scale_suspend(struct scale_device *p_scale)
+{
+    if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->suspend) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->suspend(p_scale);
+    }
+    return RET_ERR;
+}
+
+int32 scale_resume(struct scale_device *p_scale)
+{
+    if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->resume) {
+        return ((const struct scale_hal_ops *)p_scale->dev.ops)->resume(p_scale);
+    }
+    return RET_ERR;
+}
+
+
+int32 scale_request_irq(struct scale_device *p_scale, uint32 irq_flags, scale_irq_hdl irq_hdl, uint32 irq_data)
+{
+    if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->request_irq) {
+        return ((const struct scale_hal_ops *)p_scale->dev.ops)->request_irq(p_scale, irq_flags, irq_hdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 scale_release_irq(struct scale_device *p_scale, uint32 irq_flags)
+{
+    if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->release_irq) {
+        return ((const struct scale_hal_ops *)p_scale->dev.ops)->release_irq(p_scale, irq_flags);
+    }
+    return RET_ERR;
+}
+
+
+int32 scale_set_in_out_size(struct scale_device *p_scale, uint32 s_w,uint32 s_h,uint32 o_w,uint32 o_h)
+{
+    if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+        return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_IN_OUT_SIZE, (s_h<<16)|s_w, (o_h<<16)|o_w);
+    }
+    return RET_ERR;
+}
+
+int32 scale_set_step(struct scale_device *p_scale, uint32 s_w,uint32 s_h,uint32 o_w,uint32 o_h)
+{
+    if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+        return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_STEP, (s_h<<16)|s_w, (o_h<<16)|o_w);
+    }
+    return RET_ERR;
+}
+
+int32 scale_set_start_addr(struct scale_device *p_scale, uint32 s_x,uint32 s_y)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_START_ADDR, (s_y<<16)|s_x, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 scale_set_srambuf_wlen(struct scale_device *p_scale, uint32 wlen)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_SRAMBUF_WLEN, wlen, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_in_yaddr(struct scale_device *p_scale, uint32 yaddr)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_IN_Y_ADDR, yaddr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_in_uaddr(struct scale_device *p_scale, uint32 uaddr)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_IN_U_ADDR, uaddr, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 scale_set_in_vaddr(struct scale_device *p_scale, uint32 vaddr)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_IN_V_ADDR, vaddr, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 scale_set_out_yaddr(struct scale_device *p_scale, uint32 yaddr)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_OUT_Y_ADDR, yaddr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_out_uaddr(struct scale_device *p_scale, uint32 uaddr)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_OUT_U_ADDR, uaddr, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 scale_set_out_vaddr(struct scale_device *p_scale, uint32 vaddr)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_OUT_V_ADDR, vaddr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_line_buf_num(struct scale_device *p_scale, uint32 num)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_LINE_BUF_NUM, num, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_line_buf_addr(struct scale_device *p_scale, uint32 addr)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_SRAM_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_dma_to_memory(struct scale_device *p_scale, uint32 en)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_DMA_TO_MEMORY, en, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_data_from_vpp(struct scale_device *p_scale, uint32 en)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_DATA_FROM, en, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_get_inbuf_num(struct scale_device *p_scale)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_GET_INBUF_NUM, 0, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_inbuf_num(struct scale_device *p_scale,uint32 num,uint32 start_line)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_INBUF_NUM, num, start_line);
+	}
+	return RET_ERR;
+}
+
+
+int32 scale_set_new_frame(struct scale_device *p_scale,uint8 en)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_NEW_FRAME, en, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_set_end_frame(struct scale_device *p_scale,uint8 en)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_SET_END_FRAME, en, 0);
+	}
+	return RET_ERR;
+}
+
+int32 scale_get_heigh_cnt(struct scale_device *p_scale)
+{
+	if (p_scale && ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl) {
+		return ((const struct scale_hal_ops *)p_scale->dev.ops)->ioctl(p_scale, SCALE_IOCTL_CMD_GET_HEIGH_CNT, 0, 0);
+	}
+	return RET_ERR;
+}
+
+

sdk/hal/sdio_slave.c

@@ -0,0 +1,70 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/sdio_slave.h"
+
+int32 sdio_slave_open(struct sdio_slave *slave, enum sdio_slave_speed speed, uint32 flags)
+{
+    if (slave) {
+        HALDEV_SUSPENDED(slave);
+        return ((const struct sdios_hal_ops *)slave->dev.ops)->open(slave, speed, flags);
+    }
+    return RET_ERR;
+}
+
+int32 sdio_slave_close(struct sdio_slave *slave)
+{
+    if (slave) {
+        HALDEV_SUSPENDED(slave);
+        return ((const struct sdios_hal_ops *)slave->dev.ops)->close(slave);
+    }
+    return RET_ERR;
+}
+
+int32 sdio_slave_write(struct sdio_slave *slave, uint8 *buff, uint32 len, int8 sync)
+{
+    if (slave && ((const struct sdios_hal_ops *)slave->dev.ops)->write) {
+        HALDEV_SUSPENDED(slave);
+        return ((const struct sdios_hal_ops *)slave->dev.ops)->write(slave, buff, len, sync);
+    }
+    return RET_ERR;
+}
+
+int32 sdio_slave_write_scatter(struct sdio_slave *slave, scatter_data *data, uint32 count, int8 sync)
+{
+    if (slave && ((const struct sdios_hal_ops *)slave->dev.ops)->write_scatter) {
+        HALDEV_SUSPENDED(slave);
+        return ((const struct sdios_hal_ops *)slave->dev.ops)->write_scatter(slave, data, count, sync);
+    }
+    return RET_ERR;
+}
+
+int32 sdio_slave_read(struct sdio_slave *slave, uint8 *buff, uint32 len, int8 sync)
+{
+    if (slave && ((const struct sdios_hal_ops *)slave->dev.ops)->read) {
+        HALDEV_SUSPENDED(slave);
+        return ((const struct sdios_hal_ops *)slave->dev.ops)->read(slave, buff, len, sync);
+    }
+    return RET_ERR;
+}
+
+int32 sdio_slave_ioctl(struct sdio_slave *slave, uint32 cmd, uint32 param)
+{
+    if (slave && ((const struct sdios_hal_ops *)slave->dev.ops)->ioctl) {
+        HALDEV_SUSPENDED(slave);
+        return ((const struct sdios_hal_ops *)slave->dev.ops)->ioctl(slave, cmd, param);
+    }
+    return RET_ERR;
+}
+
+
+int32 sdio_slave_request_irq(struct sdio_slave *slave, sdio_slave_irq_hdl handle, uint32 data)
+{
+    if (slave && ((const struct sdios_hal_ops *)slave->dev.ops)->request_irq) {
+        HALDEV_SUSPENDED(slave);
+        return ((const struct sdios_hal_ops *)slave->dev.ops)->request_irq(slave, handle, data);
+    }
+    return RET_ERR;
+}
+

sdk/hal/sha.c

@@ -0,0 +1,110 @@
+/**
+  ******************************************************************************
+  * @file    User/xxx.c
+  * @author  HUGE-IC Application Team
+  * @version V1.0.0
+  * @date    01-08-2023
+  * @brief   Main program body
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2018 HUGE-IC</center></h2>
+  *
+  *
+  *
+  ******************************************************************************
+  */
+#include "typesdef.h"
+#include "errno.h"
+#include "list.h"
+#include "dev.h"
+#include "hal/sha.h"
+
+
+
+/*
+    brief:         
+    flags: ->   使用SHA_CALC_LAST_DATA来结束输入产生输出。
+*/
+int32 sha_calc(struct sha_dev *dev, uint8 input[], uint32 len, enum SHA_CALC_FLAGS flags)
+{
+    if (dev && ((const struct sha_hal_ops *)dev->dev.ops)->calc) {
+        return ((const struct sha_hal_ops *)dev->dev.ops)->calc(dev,input,len,flags);
+    }
+    return RET_ERR;
+}
+
+/*
+    brief:      读取时请确保sha_calc执行成功
+*/
+int32 sha_read(struct sha_dev *dev, uint8 output[], uint32 timeout)
+{
+    if (dev && ((const struct sha_hal_ops *)dev->dev.ops)->read) {
+        return ((const struct sha_hal_ops *)dev->dev.ops)->read(dev,output,timeout);
+    }
+    return RET_ERR;
+}
+
+int32 sha_ioctl(struct sha_dev *dev,uint32 cmd, uint32 para)
+{
+    if(dev && ((const struct sha_hal_ops *)dev->dev.ops)->ioctl) {
+        return ((const struct sha_hal_ops *)dev->dev.ops)->ioctl(dev,cmd,para);
+    }
+    return RET_ERR;
+}
+
+int32 sha_init(struct sha_dev *dev, enum SHA_CALC_FLAGS flags)
+{
+    if(dev && ((const struct sha_hal_ops *)dev->dev.ops)->ioctl) {
+        return ((const struct sha_hal_ops *)dev->dev.ops)->ioctl(dev,SHA_IOCTL_CMD_RESET,flags);
+    }
+    return RET_ERR;
+}
+
+int32 sha_update(struct sha_dev *dev, uint8 *input, uint32 len)
+{
+    if (dev && ((const struct sha_hal_ops *)dev->dev.ops)->calc) {
+        return ((const struct sha_hal_ops *)dev->dev.ops)->calc(dev,input,len,0);
+    }
+    return RET_ERR;
+}
+
+int32 sha_final(struct sha_dev *dev, uint8 *output)
+{
+    uint32 ret = 0;
+    // if (dev && ((const struct sha_hal_ops *)dev->dev.ops)->calc) {
+    //     ret =  ((const struct sha_hal_ops *)dev->dev.ops)->calc(dev,0x38000000,0,SHA_CALC_LAST_DATA);
+    // }
+    if (dev && ((const struct sha_hal_ops *)dev->dev.ops)->read) { 
+        ret =  ((const struct sha_hal_ops *)dev->dev.ops)->read(dev,output,0);
+    }
+    return ret;
+}
+
+int32 sha_finup(struct sha_dev *dev, uint8 *input, uint32 len, uint8 *output)
+{
+    uint32 ret = 0;
+    if (dev && ((const struct sha_hal_ops *)dev->dev.ops)->calc) {
+        ret =  ((const struct sha_hal_ops *)dev->dev.ops)->calc(dev,input,len,0);
+    }
+    if (dev && ((const struct sha_hal_ops *)dev->dev.ops)->read) {
+        ret =  ((const struct sha_hal_ops *)dev->dev.ops)->read(dev,output,0);
+    }
+    return ret;
+}
+
+int32 sha_requset_irq(struct sha_dev *dev,void *irq_handle,void *args)
+{
+    if(dev && ((const struct sha_hal_ops *)dev->dev.ops)->requset_irq) {
+        return ((const struct sha_hal_ops *)dev->dev.ops)->requset_irq(dev,irq_handle,args);
+    }
+    return RET_ERR;
+}
+
+int32 sha_release_irq(struct sha_dev *dev)
+{
+    if(dev && ((const struct sha_hal_ops *)dev->dev.ops)->release_irq) {
+        return ((const struct sha_hal_ops *)dev->dev.ops)->release_irq(dev);
+    }
+    return RET_ERR;
+}

sdk/hal/spi.c

@@ -0,0 +1,79 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/spi.h"
+
+int32 spi_open(struct spi_device *spi, uint32 clk_freq, uint32 work_mode, uint32 wire_mode, uint32 clk_mode)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->open) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->open(spi, clk_freq, work_mode, wire_mode, clk_mode);
+    }
+    return RET_ERR;
+}
+
+int32 spi_close(struct spi_device *spi)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->close) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->close(spi);
+    }
+    return RET_ERR;
+}
+
+int32 spi_ioctl(struct spi_device *spi, uint32 cmd, uint32 param1, uint32 param2)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->ioctl) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->ioctl(spi, cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+int32 spi_read(struct spi_device *spi, void *buf, uint32 size)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->read) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->read(spi, buf, size);
+    }
+    return RET_ERR;
+}
+
+int32 spi_write(struct spi_device *spi, const void *buf, uint32 size)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->write) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->write(spi, buf, size);
+    }
+    return RET_ERR;
+}
+
+int32 spi_write_scatter(struct spi_device *spi, const scatter_data *data, uint32 count)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->write_scatter) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->write_scatter(spi, data, count);
+    }
+    return RET_ERR;
+}
+
+inline int32 spi_set_cs(struct spi_device *spi, uint32 cs, uint32 value)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->ioctl) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->ioctl(spi, SPI_SET_CS, cs, value);
+    }
+    return RET_ERR;
+}
+
+int32 spi_request_irq(struct spi_device *spi, uint32 irq_flag, spi_irq_hdl irqhdl, uint32 irq_data)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->request_irq) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->request_irq(spi, irq_flag, irqhdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 spi_release_irq(struct spi_device *spi, uint32 irq_flag)
+{
+    if (spi && ((const struct spi_hal_ops *)spi->dev.ops)->release_irq) {
+        return ((const struct spi_hal_ops *)spi->dev.ops)->release_irq(spi, irq_flag);
+    }
+    return RET_ERR;
+}
+
+

sdk/hal/spi_nor.c

@@ -0,0 +1,149 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "osal/mutex.h"
+#include "hal/spi.h"
+#include "hal/spi_nor.h"
+
+int32 spi_nor_open(struct spi_nor_flash *flash)
+{
+    int32 ret = RET_OK;
+
+    ASSERT(flash->bus);
+    if(atomic_read(&flash->ref) == 0){
+        ret = spi_open(flash->spidev, flash->spi_config.clk, SPI_MASTER_MODE,
+                       flash->spi_config.wire_mode, flash->spi_config.clk_mode);
+        ASSERT(!ret);
+        if (flash->bus->open) {
+            flash->bus->open(flash);
+        }
+    }
+    atomic_inc(&flash->ref);
+    return ret;
+}
+
+void spi_nor_close(struct spi_nor_flash *flash)
+{
+    ASSERT(flash->bus);
+
+    if(atomic_dec_and_test(&flash->ref)){
+        if (flash->bus->close) {
+            flash->bus->close(flash);
+        }
+        spi_set_cs(flash->spidev, flash->spi_config.cs, 1);
+        spi_close(flash->spidev);
+    }
+}
+
+void spi_nor_read(struct spi_nor_flash *flash, uint32 addr, uint8 *buf, uint32 len)
+{
+    ASSERT(flash->bus);
+    os_mutex_lock(&flash->lock, osWaitForever);
+    flash->bus->read(flash, addr, buf, len);
+    os_mutex_unlock(&flash->lock);
+}
+
+void spi_nor_write(struct spi_nor_flash *flash, uint32 addr, uint8 *buf, uint32 len)
+{
+    uint32 remain_size;
+    ASSERT(flash->bus);
+    
+    os_mutex_lock(&flash->lock, osWaitForever);
+    /* Flash is written according to page */
+    remain_size = flash->page_size - (addr % flash->page_size);
+    if(remain_size && (len > remain_size)) {
+        flash->bus->program(flash, addr, buf, remain_size);
+        addr += remain_size;
+        buf  += remain_size;
+        len  -= remain_size;
+    }
+    while(len > flash->page_size) {
+        flash->bus->program(flash, addr, buf, flash->page_size);
+        addr += flash->page_size;
+        buf  += flash->page_size;
+        len  -= flash->page_size;
+    }
+    
+    flash->bus->program(flash, addr, buf, len);
+    os_mutex_unlock(&flash->lock);
+}
+
+void spi_nor_sector_erase(struct spi_nor_flash *flash, uint32 sector_addr)
+{
+    ASSERT(flash->bus);
+    os_mutex_lock(&flash->lock, osWaitForever);
+    flash->bus->sector_erase(flash, sector_addr);
+    os_mutex_unlock(&flash->lock);
+}
+
+void spi_nor_block_erase(struct spi_nor_flash *flash, uint32 block_addr)
+{
+    ASSERT(flash->bus);
+    os_mutex_lock(&flash->lock, osWaitForever);
+    flash->bus->block_erase(flash, block_addr);
+    os_mutex_unlock(&flash->lock);
+}
+
+void spi_nor_chip_erase(struct spi_nor_flash *flash)
+{
+    ASSERT(flash->bus);
+    os_mutex_lock(&flash->lock, osWaitForever);
+    flash->bus->chip_erase(flash);
+    os_mutex_unlock(&flash->lock);
+}
+
+void spi_nor_erase_security_reg(struct spi_nor_flash *flash, uint32 addr)
+{
+    ASSERT(flash->bus);
+    os_mutex_lock(&flash->lock, osWaitForever);
+    flash->bus->erase_security_reg(flash, addr);
+    os_mutex_unlock(&flash->lock);
+}
+
+void spi_nor_program_security_reg(struct spi_nor_flash *flash, uint32 addr, uint8 *buf, uint32 size)
+{
+    ASSERT(flash->bus);
+    os_mutex_lock(&flash->lock, osWaitForever);
+    flash->bus->program_security_reg(flash, addr, buf, size);
+    os_mutex_unlock(&flash->lock);
+}
+
+void spi_nor_read_security_reg(struct spi_nor_flash *flash, uint32 addr, uint8 *buf, uint32 size)
+{
+    ASSERT(flash->bus);
+    os_mutex_lock(&flash->lock, osWaitForever);
+    flash->bus->read_security_reg(flash, addr, buf, size);
+    os_mutex_unlock(&flash->lock);
+}
+
+void spi_nor_custom_read(struct spi_nor_flash *flash, uint32_t param)
+{
+    ASSERT(flash->bus);
+    return flash->bus->custom_read(flash, param);
+}
+
+void spi_nor_custom_write(struct spi_nor_flash *flash, uint32_t param)
+{
+    ASSERT(flash->bus);
+    return flash->bus->custom_write(flash, param);
+}
+
+void spi_nor_custom_erase(struct spi_nor_flash *flash, uint32_t param)
+{
+    ASSERT(flash->bus);
+    return flash->bus->custom_erase(flash, param);
+}
+
+__init int32 spi_nor_attach(struct spi_nor_flash *flash, uint32 dev_id)
+{
+    int32 ret = 0;
+
+    ASSERT(flash->size && flash->sector_size);
+    os_mutex_init(&flash->lock);
+    flash->bus = spi_nor_bus_get(flash->mode);
+    ASSERT(flash->bus);
+    ret = dev_register(dev_id, (struct dev_obj *)flash);
+    return ret;
+}
+

sdk/hal/sysaes.c

@@ -0,0 +1,23 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/sysaes.h"
+
+int32 sysaes_encrypt(struct sysaes_dev *dev, struct sysaes_para *para)
+{
+    if (dev && ((const struct aes_hal_ops *)dev->dev.ops)->encrypt) {
+        return ((const struct aes_hal_ops *)dev->dev.ops)->encrypt(dev, para);
+    }
+    return RET_ERR;
+}
+
+int32 sysaes_decrypt(struct sysaes_dev *dev, struct sysaes_para *para)
+{
+    if (dev && ((const struct aes_hal_ops *)dev->dev.ops)->decrypt) {
+        return ((const struct aes_hal_ops *)dev->dev.ops)->decrypt(dev, para);
+    }
+    return RET_ERR;
+}
+
+

sdk/hal/timer.c

@@ -0,0 +1,78 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/timer_device.h"
+
+int32 timer_device_open(struct timer_device *timer, enum timer_type type, uint32 flags)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->open) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->open(timer, type, flags);
+    }
+    return RET_ERR;
+}
+
+int32 timer_device_close(struct timer_device *timer)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->close) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->close(timer);
+    }
+    return RET_ERR;
+}
+
+int32 timer_device_start(struct timer_device *timer, uint32 period_sysclkpd_cnt, timer_cb_hdl cb, uint32 cb_data)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->start) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->start(timer, period_sysclkpd_cnt, cb, cb_data);
+    }
+    return RET_ERR;
+}
+
+int32 timer_device_stop(struct timer_device *timer)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->stop) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->stop(timer);
+    }
+    return RET_ERR;
+}
+
+int32 timer_device_suspend(struct timer_device *timer)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->suspend) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->suspend(timer);
+    }
+    return RET_ERR;
+}
+
+int32 timer_device_resume(struct timer_device *timer)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->resume) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->resume(timer);
+    }
+    return RET_ERR;
+}
+
+int32 timer_device_ioctl(struct timer_device *timer, uint32 cmd, uint32 param1, uint32 param2)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->ioctl) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->ioctl(timer, cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+int32 timer_request_irq(struct timer_device *timer, uint32 irq_flag, timer_cb_hdl cb, uint32 cb_data)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->request_irq) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->request_irq(timer, irq_flag, cb, cb_data);
+    }
+    return RET_ERR;
+}
+
+int32 timer_release_irq(struct timer_device *timer, uint32 irq_flag)
+{
+    if (timer && ((const struct timer_hal_ops *)timer->dev.ops)->release_irq) {
+        return ((const struct timer_hal_ops *)timer->dev.ops)->release_irq(timer, irq_flag);
+    }
+    return RET_ERR;
+}
+

sdk/hal/tk.c

@@ -0,0 +1,55 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "hal/tk.h"
+
+int32 tk_open(struct tk_device *tk)
+{
+    if (tk)
+    {
+        return ((const struct tk_hal_ops *)tk->dev.ops)->open(tk);
+    }
+    
+    return RET_ERR;
+}
+
+int32 tk_ioctl(struct tk_device *tk, enum touchkey_ioctl_cmd ioctl_cmd, uint32 param)
+{
+    if (tk && ((const struct tk_hal_ops *)tk->dev.ops)->ioctl)
+    {
+        return ((const struct tk_hal_ops *)tk->dev.ops)->ioctl(tk, ioctl_cmd, param);
+    }
+
+    return RET_ERR;
+}
+
+int32 tk_irq_request(struct tk_device *tk, tk_irq_hdl irq_hdl, uint32 irq_flag,  uint32 irq_data)
+{
+    if (tk && ((const struct tk_hal_ops *)tk->dev.ops)->request_irq)
+    {
+        return ((const struct tk_hal_ops *)tk->dev.ops)->request_irq(tk, irq_hdl, irq_flag, irq_data);
+    }
+
+    return RET_ERR;
+}
+
+int32 tk_irq_release(struct tk_device *tk, uint32 irq_flag)
+{
+    if (tk && ((const struct tk_hal_ops *)tk->dev.ops)->release_irq)
+    {
+        return ((const struct tk_hal_ops *)tk->dev.ops)->release_irq(tk, irq_flag);
+    }
+    
+    return RET_ERR;
+}
+
+int32 tk_close(struct tk_device *tk)
+{
+    if (tk)
+    {
+        return ((const struct tk_hal_ops *)tk->dev.ops)->close(tk);
+    }
+    
+    return RET_ERR;
+}

sdk/hal/uart.c

@@ -0,0 +1,226 @@
+/**
+  ******************************************************************************
+  * @file       sdk/hal/uart.h
+  * @author     HUGE-IC Application Team
+  * @version    V1.0.0
+  * @date       2022-01-11
+  * @brief      This file contains all the UART HAL functions.
+  * @copyright  Copyright (c) 2016-2022 HUGE-IC
+  ******************************************************************************
+  * @attention
+  * None
+  *
+  *
+  *
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "typesdef.h"
+#include "errno.h"
+#include "list.h"
+#include "dev.h"
+#include "hal/uart.h"
+
+/** @defgroup Docxygenid_UART_Driver UART Driver
+  * @brief    Mainly the driver part of the UART module
+  * @{
+  */
+
+
+/** @defgroup Docxygenid_UART_functions UART functions
+  * @ingroup  Docxygenid_UART_Driver
+  * @brief    UART Initialization And Configuration functions
+  * @{
+  */
+
+
+/**
+  * @brief  Open uart with baudrate and the default configuration.
+  * @param  uart      : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @param  baudrate  : Configure the baudrate for UART.
+  * @return
+  *         - RET_OK  : UART module open successfully.
+  *         - RET_ERR : UART module open unsuccessfully.
+  * @note
+  *         The default configuration is full duplex mode, no parity mode,\n
+  *         data bit is 8bit, stop bit is 1bit.If you need to change the configuration,\n
+  *         you can use the @ref uart_ioctl function to make changes after initialization is complete.
+  */
+int32 uart_open(struct uart_device *uart, uint32 baudrate)
+{
+    if (uart) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->open(uart, baudrate);
+    }
+    return RET_ERR;
+}
+
+/**
+  * @brief  Close the UART module.
+  * @param  uart : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @return
+  *         - RET_OK  : UART module close successfully.
+  *         - RET_ERR : UART module close unsuccessfully.
+  * @note
+  *         The UART will not be able to send and receive data normally,\n
+  *         and all configurations (including interrupt-related configurations) will be invalid.
+  */
+int32 uart_close(struct uart_device *uart)
+{
+    if (uart) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->close(uart);
+    }
+    return RET_ERR;
+}
+
+/**
+  * @brief  UART sends a frame of data.
+  * @param  uart  : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @param  vaule : The data to be sent by the UART, the unit is 1 frame.
+  * @return
+  *         - RET_OK  : UART module send successfully.
+  *         - RET_ERR : UART module send unsuccessfully.
+  * @note
+  *         If the UART configuration data bit is 8bit, one frame of data is 8bit;\n
+  *         if the data bit is 9bit, one frame of data is 9bit.
+  */
+int32 uart_putc(struct uart_device *uart, int8 value)
+{
+    if (uart) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->putc(uart, value);
+    }
+    return RET_ERR;
+}
+
+/**
+  * @brief  UART receives a frame of data.
+  * @param  uart : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @return
+  *         - value : The data value.
+  * @note
+  *         If the UART configuration data bit is 8bit, one frame of data is 8bit;\n
+  *         if the data bit is 9bit, one frame of data is 9bit.
+  */
+uint8 uart_getc(struct uart_device *uart)
+{
+    if (uart) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->getc(uart);
+    }
+    return RET_ERR;
+}
+
+/**
+  * @brief  The UART sends data according to the address and data number of the DATA BUFFER.
+  * @param  uart : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @param  buf  : Start address of DATA BUFFER.
+  * @param  len  : The number of data to be sent, the default unit is 8bit.
+  * @return
+  *         - RET_OK  : UART module send successfully.
+  *         - RET_ERR : UART module send unsuccessfully.
+  * @note
+  *         Send uses CPU by default. To use DMA transmission,\n
+  *         it needs to be configured using the @ref uart_ioctl() function.
+  */
+int32 uart_puts(struct uart_device *uart, uint8 *buf, uint32 len)
+{
+    if (uart) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->puts(uart, buf, len);
+    }
+    return RET_ERR;
+}
+
+/**
+  * @brief  The UART receive data according to the address and data number of the DATA BUFFER.
+  * @param  uart : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @param  buf  : Start address of DATA BUFFER.
+  * @param  len  : The number of data to be sent, the default unit is 8bit.
+  * @return
+  *         - RET_OK  : UART module send successfully.
+  *         - RET_ERR : UART module send unsuccessfully.
+  * @note
+  *         Send uses CPU by default. To use DMA transmission,
+  *         it needs to be configured using the @ref uart_ioctl() function.
+  */
+int32 uart_gets(struct uart_device *uart, uint8 *buf, uint32 len)
+{
+    if (uart) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->gets(uart, buf, len);
+    }
+    return RET_ERR;
+}
+
+/**
+  * @brief  Configure the UART module by ioctl_cmd.
+  * @param  uart      : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @param  ioctl_cmd : Commands to configure the UART module, reference @ref uart_ioctl_cmd.
+  * @param  param1    : Parameter 1, according to the command.
+  * @param  param2    : Parameter 2, according to the command.
+  * @return
+  *         - RET_OK  : UART module configure successfully.
+  *         - RET_ERR : UART module configure unsuccessfully.
+  * @note
+  *         None.
+  */
+int32 uart_ioctl(struct uart_device *uart, enum uart_ioctl_cmd ioctl_cmd, uint32 param1, uint32 param2)
+{
+    if (uart && ((const struct uart_hal_ops *)uart->dev.ops)->ioctl) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->ioctl(uart, ioctl_cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+/**
+  * @brief  Request interrupt by irq_flag.
+  * @param  uart     : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @param  irq_hdl  : Interrupt handle, executed after the interrupt is generated.
+  * @param  irq_flag : Interrupt type, reference @ref uart_irq_flag.
+  * @param  irq_data : Parameters for interrupt handler.
+  * @return
+  *         - RET_OK  : UART module request interrupt successfully.
+  *         - RET_ERR : UART module request interrupt unsuccessfully.
+  * @note
+  *         Support multiple interrupts to request together.
+  */
+int32 uart_request_irq(struct uart_device *uart, uart_irq_hdl irq_hdl, uint32 irq_flag,  uint32 irq_data)
+{
+    if (uart && ((const struct uart_hal_ops *)uart->dev.ops)->request_irq) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->request_irq(uart, irq_hdl, irq_flag, irq_data);
+    }
+    return RET_ERR;
+}
+
+/**
+  * @brief  Release interrupt by irq_flag.
+  * @param  uart     : UART handle. Usually use @ref dev_get() function to get the handle.
+  * @param  irq_flag : Interrupt type, reference @ref uart_irq_flag.
+  * @return
+  *         - RET_OK  : UART module release interrupt successfully.
+  *         - RET_ERR : UART module release interrupt unsuccessfully.
+  * @note
+  *         Support multiple interrupts to release together.
+  */
+int32 uart_release_irq(struct uart_device *uart, uint32 irq_flag)
+{
+    if (uart && ((const struct uart_hal_ops *)uart->dev.ops)->release_irq) {
+        HALDEV_SUSPENDED(uart);
+        return ((const struct uart_hal_ops *)uart->dev.ops)->release_irq(uart, irq_flag);
+    }
+    return RET_ERR;
+}
+
+/** @} Docxygenid_UART_functions*/
+
+/** @} Docxygenid_UART_Driver*/
+
+
+
+/*************************** (C) COPYRIGHT 2016-2022 HUGE-IC ***** END OF FILE *****/

sdk/hal/usb_device.c

@@ -0,0 +1,63 @@
+#include "sys_config.h"
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/usb_device.h"
+
+int32 usb_device_open(struct usb_device *p_usb_d, struct usb_device_cfg *p_usbdev_cfg)
+{
+    if (p_usb_d && ((const struct usb_hal_ops *)p_usb_d->dev.ops)->open) {
+        return ((const struct usb_hal_ops *)p_usb_d->dev.ops)->open(p_usb_d, p_usbdev_cfg);
+    }
+    return RET_ERR;
+}
+
+int32 usb_device_close(struct usb_device *p_usb_d)
+{
+    if (p_usb_d && ((const struct usb_hal_ops *)p_usb_d->dev.ops)->close) {
+        return ((const struct usb_hal_ops *)p_usb_d->dev.ops)->close(p_usb_d);
+    }
+    return RET_ERR;
+}
+
+int32 usb_device_write(struct usb_device *p_usb_d, uint8 ep, uint8 *buff, uint32 len, uint8 sync)
+{
+    if (p_usb_d && ((const struct usb_hal_ops *)p_usb_d->dev.ops)->write) {
+        return ((const struct usb_hal_ops *)p_usb_d->dev.ops)->write(p_usb_d, ep, buff, len, sync);
+    }
+    return RET_ERR;
+}
+int32 usb_device_write_scatter(struct usb_device *p_usb_d, uint8 ep, scatter_data *data, uint32 count, uint8 sync)
+{
+    if (p_usb_d && ((const struct usb_hal_ops *)p_usb_d->dev.ops)->write_scatter) {
+        return ((const struct usb_hal_ops *)p_usb_d->dev.ops)->write_scatter(p_usb_d, ep, data, count, sync);
+    }
+    return RET_ERR;
+}
+
+int32 usb_device_read(struct usb_device *p_usb_d, uint8 ep, uint8 *buff, uint32 len, uint8 sync)
+{
+    if (p_usb_d && ((const struct usb_hal_ops *)p_usb_d->dev.ops)->read) {
+        return ((const struct usb_hal_ops *)p_usb_d->dev.ops)->read(p_usb_d, ep, buff, len, sync);
+    }
+    return RET_ERR;
+}
+
+int32 usb_device_ioctl(struct usb_device *p_usb_d, uint32 cmd, uint32 param1, uint32 param2)
+{
+    if (p_usb_d && ((const struct usb_hal_ops *)p_usb_d->dev.ops)->ioctl) {
+        return ((const struct usb_hal_ops *)p_usb_d->dev.ops)->ioctl(p_usb_d, cmd, param1, param2);
+    }
+    return RET_ERR;
+}
+
+int32 usb_device_request_irq(struct usb_device *p_usb_d, usbdev_irq_hdl handle, uint32 data)
+{
+    if (p_usb_d && ((const struct usb_hal_ops *)p_usb_d->dev.ops)->request_irq) {
+        return ((const struct usb_hal_ops *)p_usb_d->dev.ops)->request_irq(p_usb_d, handle, data);
+    }
+    return RET_ERR;
+}
+

sdk/hal/vpp.c

@@ -0,0 +1,391 @@
+#include "typesdef.h"
+#include "list.h"
+#include "errno.h"
+#include "dev.h"
+#include "devid.h"
+#include "hal/vpp.h"
+
+int32 vpp_open(struct vpp_device *p_vpp)
+{
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->open) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->open(p_vpp);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_close(struct vpp_device *p_vpp)
+{
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->close) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->close(p_vpp);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_suspend(struct vpp_device *p_vpp)
+{
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->suspend) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->suspend(p_vpp);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_resume(struct vpp_device *p_vpp)
+{
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->resume) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->resume(p_vpp);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_dis_uv_mode(struct vpp_device *p_vpp,uint8 enable){
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_DIS_UV_MODE, enable, 0);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_set_threshold(struct vpp_device *p_vpp,uint32 dlt,uint32 dht){
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_THRESHOLD, dlt, dht);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_set_water0_rc(struct vpp_device *p_vpp,uint8 enable){
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_RC, enable, 0);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_set_water1_rc(struct vpp_device *p_vpp,uint8 enable){
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK1_RC, enable, 0);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_set_water0_color(struct vpp_device *p_vpp,uint8 y,uint8 u,uint8 v){
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_COLOR, y|(u<<8)|(v<<16), 0);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_set_water1_color(struct vpp_device *p_vpp,uint8 y,uint8 u,uint8 v){
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK1_COLOR, y|(u<<8)|(v<<16), 0);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_set_water0_bitmap(struct vpp_device *p_vpp,uint32 bitmap){
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_BMPADR, bitmap, 0);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_set_water1_bitmap(struct vpp_device *p_vpp,uint32 bitmap){
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK1_BMPADR, bitmap, 0);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_set_water0_locate(struct vpp_device *p_vpp,uint8 x,uint8 y){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_LOCATED, (y<<8)|x, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_water1_locate(struct vpp_device *p_vpp,uint8 x,uint8 y){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK1_LOCATED, (y<<8)|x, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 vpp_set_water0_contrast(struct vpp_device *p_vpp,uint8 contrast){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_CONTRAST, contrast, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_water1_contrast(struct vpp_device *p_vpp,uint8 contrast){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK1_CONTRAST, contrast, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 vpp_set_watermark0_charsize_and_num(struct vpp_device *p_vpp,uint8 w,uint8 h,uint8 num){
+	
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_CHAR_SIZE_AND_NUM, w|(h<<8), num);
+	}
+	return RET_ERR;
+}
+
+
+int32 vpp_set_watermark0_idx(struct vpp_device *p_vpp,uint8 index_num,uint8 index){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_CHAR_IDX, index, index_num);
+	}
+	return RET_ERR;
+}
+
+
+int32 vpp_set_watermark1_size(struct vpp_device *p_vpp,uint8 w,uint8 h){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK1_PHOTO_SIZE, (h<<8)|w, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 vpp_set_watermark0_mode(struct vpp_device *p_vpp,uint8 mode){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_MODE, mode, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_watermark1_mode(struct vpp_device *p_vpp,uint8 mode){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK1_MODE, mode, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_watermark0_enable(struct vpp_device *p_vpp,uint8 enable){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK0_EN, enable, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_watermark1_enable(struct vpp_device *p_vpp,uint8 enable){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_WATERMARK1_EN, enable, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_motion_det_enable(struct vpp_device *p_vpp,uint8 enable){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_MOTION_DET_EN, enable, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_motion_calbuf(struct vpp_device *p_vpp,uint32 calbuf){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_MOTION_CALBUF, calbuf, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_motion_range(struct vpp_device *p_vpp,uint16 x_s,uint16 y_s,uint16 x_e,uint16 y_e){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_MOTION_RANGE, x_s|(y_s<<16), x_e|(y_e<<16));
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_motion_blk_threshold(struct vpp_device *p_vpp,uint8 threshold){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_MOTION_BLK_THRESHOLD, threshold, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_motion_frame_threshold(struct vpp_device *p_vpp,uint32 threshold){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_MOTION_FRAME_THRESHOLD, threshold, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_ifp_addr(struct vpp_device *p_vpp,uint32 addr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_IFP_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_ifp_en(struct vpp_device *p_vpp,uint8 enable){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_IFP_EN, enable, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_mode(struct vpp_device *p_vpp,uint8 mode){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_MODE, mode, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_video_size(struct vpp_device *p_vpp,uint32 w,uint32 h){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_SIZE, w, h);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_ycbcr(struct vpp_device *p_vpp,uint8 ycbcr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_YCBCR, ycbcr, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 vpp_set_buf0_count(struct vpp_device *p_vpp,uint8 cnt){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF0_CNT, cnt, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf1_count(struct vpp_device *p_vpp,uint8 cnt){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF1_CNT, cnt, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf1_en(struct vpp_device *p_vpp,uint8 enable){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF1_EN, enable, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf1_shrink(struct vpp_device *p_vpp,uint8 half){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF1_SHRINK, half, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_input_interface(struct vpp_device *p_vpp,uint8 mode){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_INPUT_INTERFACE, mode, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf0_y_addr(struct vpp_device *p_vpp,uint32 addr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF0_Y_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf0_u_addr(struct vpp_device *p_vpp,uint32 addr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF0_U_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf0_v_addr(struct vpp_device *p_vpp,uint32 addr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF0_V_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf1_y_addr(struct vpp_device *p_vpp,uint32 addr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF1_Y_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf1_u_addr(struct vpp_device *p_vpp,uint32 addr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF1_U_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_buf1_v_addr(struct vpp_device *p_vpp,uint32 addr)
+{
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_BUF1_V_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_itp_y_addr(struct vpp_device *p_vpp,uint32 addr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_ITP_Y_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_itp_u_addr(struct vpp_device *p_vpp,uint32 addr){
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_ITP_U_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_itp_v_addr(struct vpp_device *p_vpp,uint32 addr)
+{
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_ITP_V_ADDR, addr, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_itp_linebuf(struct vpp_device *p_vpp,uint32 linebuf)
+{
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_SET_TAKE_PHOTO_LINEBUF, linebuf, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_itp_enable(struct vpp_device *p_vpp,uint8 en)
+{
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_ITP_EN, en, 0);
+	}
+	return RET_ERR;
+}
+
+int32 vpp_set_itp_auto_close(struct vpp_device *p_vpp,uint8 en)
+{
+	if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl) {
+		return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->ioctl(p_vpp, VPP_IOCTL_CMD_ITP_AUTO_CLOSE, en, 0);
+	}
+	return RET_ERR;
+}
+
+
+int32 vpp_request_irq(struct vpp_device *p_vpp, uint32 irq_flags, vpp_irq_hdl irq_hdl, uint32 irq_data)
+{
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->request_irq) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->request_irq(p_vpp, irq_flags, irq_hdl, irq_data);
+    }
+    return RET_ERR;
+}
+
+int32 vpp_release_irq(struct vpp_device *p_vpp, uint32 irq_flags)
+{
+    if (p_vpp && ((const struct vpp_hal_ops *)p_vpp->dev.ops)->release_irq) {
+        return ((const struct vpp_hal_ops *)p_vpp->dev.ops)->release_irq(p_vpp, irq_flags);
+    }
+    return RET_ERR;
+}
+
+