reformatted the NmraDcc.h & NmraDcc.cpp files using the astyle rules in the new file: .astyle as per the PR from David Zuhn (davidzuhn)
This commit is contained in:
126
NmraDcc.cpp
126
NmraDcc.cpp
@@ -369,7 +369,8 @@ void ExternalInterruptHandler(void)
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static byte halfBit, DCC_IrqRunning, preambleBitCount;
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unsigned int actMicros, bitMicros;
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#ifdef ALLOW_NESTED_IRQ
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if ( DCC_IrqRunning ) {
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if (DCC_IrqRunning)
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{
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// nested DCC IRQ - obviously there are glitches
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// ignore this interrupt and increment glitchcounter
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CLR_TP3;
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@@ -383,23 +384,28 @@ void ExternalInterruptHandler(void)
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actMicros = micros();
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bitMicros = actMicros-lastMicros;
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CLR_TP3; SET_TP3;
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CLR_TP3;
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SET_TP3;
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#ifdef __AVR_MEGA__
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if ( bitMicros < bitMin || ( DccRx.State != WAIT_START_BIT && (*DccProcState.ExtIntPort & DccProcState.ExtIntMask) != (ISRLevel) ) ) {
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if (bitMicros < bitMin || (DccRx.State != WAIT_START_BIT && (*DccProcState.ExtIntPort & DccProcState.ExtIntMask) != (ISRLevel)))
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{
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#else
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if ( bitMicros < bitMin || ( DccRx.State != WAIT_START_BIT && digitalRead( DccProcState.ExtIntPinNum ) != (ISRLevel) ) ) {
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if (bitMicros < bitMin || (DccRx.State != WAIT_START_BIT && digitalRead (DccProcState.ExtIntPinNum) != (ISRLevel)))
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{
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#endif
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// too short - my be false interrupt due to glitch or false protocol or level does not match RISING / FALLING edge -> ignore this IRQ
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CLR_TP3;
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SET_TP4; /*delayMicroseconds(1); */ CLR_TP4;
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return; //>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> abort IRQ
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}
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CLR_TP3; SET_TP3;
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CLR_TP3;
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SET_TP3;
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lastMicros = actMicros;
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#ifndef SUPPORT_ZERO_BIT_STRETCHING
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//if ( bitMicros > MAX_ZEROBITFULL ) {
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if ( bitMicros > (bitMax*2) ) {
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if (bitMicros > (bitMax*2))
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{
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// too long - my be false protocol -> start over
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DccRx.State = WAIT_PREAMBLE ;
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DccRx.BitCount = 0 ;
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@@ -446,9 +452,11 @@ void ExternalInterruptHandler(void)
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#ifndef SYNC_ALWAYS
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case WAIT_START_BIT_FULL:
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// wait for startbit without level checking
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if ( !DccBitVal ) {
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if (!DccBitVal)
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{
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// we got the startbit
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CLR_TP2;CLR_TP1;
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CLR_TP2;
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CLR_TP1;
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DccRx.State = WAIT_DATA ;
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CLR_TP1;
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// initialize packet buffer
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@@ -465,25 +473,31 @@ void ExternalInterruptHandler(void)
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#endif
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case WAIT_START_BIT:
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// we are looking for first half "0" bit after preamble
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switch ( halfBit ) {
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switch (halfBit)
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{
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case 0:
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// check first part
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if ( DccBitVal ) {
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if (DccBitVal)
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{
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// is still 1-bit (Preamble)
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halfBit=1;
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bit1=bitMicros;
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} else {
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}
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else
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{
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// was "0" half bit, maybe the startbit
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halfBit = 4;
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}
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break;
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case 1: // previous halfbit was '1'
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if ( DccBitVal ) {
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if (DccBitVal)
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{
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// its a '1' halfBit -> we are still in the preamble
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halfBit = 0;
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bit2=bitMicros;
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preambleBitCount++;
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if( abs(bit2-bit1) > MAX_BITDIFF ) {
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if (abs (bit2-bit1) > MAX_BITDIFF)
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{
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// the length of the 2 halfbits differ too much -> wrong protokoll
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DccRx.State = WAIT_PREAMBLE;
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bitMax = MAX_PRAEAMBEL;
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@@ -506,7 +520,9 @@ void ExternalInterruptHandler(void)
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SET_TP3;
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CLR_TP4;
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}
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} else {
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}
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else
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{
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// first '0' half detected in second halfBit
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// wrong sync or not a DCC protokoll
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CLR_TP3;
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@@ -515,18 +531,23 @@ void ExternalInterruptHandler(void)
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}
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break;
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case 3: // previous halfbit was '0' in second halfbit
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if ( DccBitVal ) {
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if (DccBitVal)
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{
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// its a '1' halfbit -> we got only a half '0' bit -> cannot be DCC
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DccRx.State = WAIT_PREAMBLE;
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bitMax = MAX_PRAEAMBEL;
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bitMin = MIN_ONEBITFULL;
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preambleBitCount = 0;
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// SET_TP2; CLR_TP2;
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} else {
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}
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else
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{
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// we got two '0' halfbits -> it's the startbit
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// but sync is NOT ok, change IRQ edge.
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CLR_TP2;CLR_TP1;
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if ( ISREdge == RISING ) ISREdge = FALLING; else ISREdge = RISING;
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CLR_TP2;
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CLR_TP1;
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if (ISREdge == RISING) ISREdge = FALLING;
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else ISREdge = RISING;
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DccRx.State = WAIT_DATA ;
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CLR_TP1;
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bitMax = MAX_ONEBITFULL;
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@@ -559,17 +580,22 @@ void ExternalInterruptHandler(void)
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break;
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case 4: // previous (first) halfbit was 0
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// if this halfbit is 0 too, we got the startbit
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if ( DccBitVal ) {
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if (DccBitVal)
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{
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// second halfbit is 1 -> unknown protokoll
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DccRx.State = WAIT_PREAMBLE;
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bitMax = MAX_PRAEAMBEL;
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bitMin = MIN_ONEBITFULL;
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preambleBitCount = 0;
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CLR_TP2;CLR_TP1;
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CLR_TP2;
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CLR_TP1;
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DccRx.BitCount = 0;
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} else {
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}
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else
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{
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// we got the startbit
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CLR_TP2;CLR_TP1;
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CLR_TP2;
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CLR_TP1;
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DccRx.State = WAIT_DATA ;
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CLR_TP1;
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bitMax = MAX_ONEBITFULL;
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@@ -634,16 +660,20 @@ void ExternalInterruptHandler(void)
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break;
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case WAIT_END_BIT:
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SET_TP2;CLR_TP2;
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SET_TP2;
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CLR_TP2;
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DccRx.BitCount++;
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if( DccBitVal ) { // End of packet?
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CLR_TP3; SET_TP4;
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if (DccBitVal) // End of packet?
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{
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CLR_TP3;
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SET_TP4;
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DccRx.State = WAIT_PREAMBLE ;
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DccRx.BitCount = 0 ;
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bitMax = MAX_PRAEAMBEL;
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bitMin = MIN_ONEBITFULL;
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SET_TP1;
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if ( DccRx.chkSum == 0 ) {
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if (DccRx.chkSum == 0)
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{
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// Packet is valid
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#ifdef ESP32
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portENTER_CRITICAL_ISR (&mux);
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@@ -655,7 +685,9 @@ void ExternalInterruptHandler(void)
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#endif
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// SET_TP2; CLR_TP2;
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preambleBitCount = 0 ;
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} else {
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}
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else
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{
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// Wrong checksum
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CLR_TP1;
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#ifdef DCC_DBGVAR
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@@ -664,8 +696,11 @@ void ExternalInterruptHandler(void)
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#endif
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}
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SET_TP3; CLR_TP4;
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} else { // Get next Byte
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SET_TP3;
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CLR_TP4;
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}
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else // Get next Byte
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{
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// KGW - Abort immediately if packet is too long.
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if (DccRx.PacketBuf.Size == MAX_DCC_MESSAGE_LEN) // Packet is too long - abort
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{
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@@ -688,18 +723,23 @@ void ExternalInterruptHandler(void)
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// we always search for a preamble ( ( 10 or more consecutive 1 bits )
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// if we found it within a packet, the packet decoding is aborted because
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// that much one bits cannot be valid in a packet.
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if ( DccRx.State != WAIT_START_BIT ) {
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if (DccRx.State != WAIT_START_BIT)
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{
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if (DccBitVal)
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{
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preambleBitCount++;
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//SET_TP2;
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if( preambleBitCount > 10 ) {
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if (preambleBitCount > 10)
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{
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CLR_TP2;
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#ifndef SYNC_ALWAYS
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if ( DccRx.chkSum == 0 ) {
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if (DccRx.chkSum == 0)
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{
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// sync must be correct if chksum was ok, no need to check sync
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DccRx.State = WAIT_START_BIT_FULL;
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} else {
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}
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else
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{
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#endif
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DccRx.State = WAIT_START_BIT ;
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SET_TP2;
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@@ -724,7 +764,9 @@ void ExternalInterruptHandler(void)
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}
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#endif
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}
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} else {
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}
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else
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{
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CLR_TP1;
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preambleBitCount = 0 ;
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// SET_TP2; CLR_TP2;
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@@ -1357,14 +1399,19 @@ void execDccProcessor( DCC_MSG * pDccMsg )
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// If we're filtering addresses, does the address match our address or is it a broadcast address? If NOT then return
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if (DccProcState.Flags & FLAGS_MY_ADDRESS_ONLY)
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{
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if( DccProcState.Flags & FLAGS_OUTPUT_ADDRESS_MODE ) {
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if (DccProcState.Flags & FLAGS_OUTPUT_ADDRESS_MODE)
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{
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DB_PRINT (" AddrChk: OAddr:%d, BAddr:%d, myAddr:%d Chk=%d", OutputAddress, BoardAddress, getMyAddr(), OutputAddress != getMyAddr());
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if ( OutputAddress != getMyAddr() && OutputAddress < 2045 ) {
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if (OutputAddress != getMyAddr() && OutputAddress < 2045)
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{
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DB_PRINT (" eDP: OAddr:%d, myAddr:%d - no match", OutputAddress, getMyAddr());
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return;
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}
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} else {
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if( ( BoardAddress != getMyAddr() ) && ( BoardAddress < 511 ) ) {
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}
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else
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{
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if ( (BoardAddress != getMyAddr()) && (BoardAddress < 511))
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{
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DB_PRINT (" eDP: BAddr:%d, myAddr:%d - no match", BoardAddress, getMyAddr());
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return;
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}
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@@ -1517,7 +1564,8 @@ void NmraDcc::pin( uint8_t ExtIntNum, uint8_t ExtIntPinNum, uint8_t EnablePullup
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// because STM32F1 has a NVIC we must set interuptpriorities
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const nvic_irq_num irqNum2nvic[] = { NVIC_EXTI0, NVIC_EXTI1, NVIC_EXTI2, NVIC_EXTI3, NVIC_EXTI4,
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NVIC_EXTI_9_5, NVIC_EXTI_9_5, NVIC_EXTI_9_5, NVIC_EXTI_9_5, NVIC_EXTI_9_5,
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NVIC_EXTI_15_10, NVIC_EXTI_15_10, NVIC_EXTI_15_10, NVIC_EXTI_15_10, NVIC_EXTI_15_10, NVIC_EXTI_15_10 };
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NVIC_EXTI_15_10, NVIC_EXTI_15_10, NVIC_EXTI_15_10, NVIC_EXTI_15_10, NVIC_EXTI_15_10, NVIC_EXTI_15_10
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};
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exti_num irqNum = (exti_num) (PIN_MAP[ExtIntPinNum].gpio_bit);
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// DCC-Input IRQ must be able to interrupt other long low priority ( level15 ) IRQ's
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15
NmraDcc.h
15
NmraDcc.h
@@ -132,7 +132,8 @@ typedef struct
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#define MAXCV E2END // the upper limit of the CV value currently defined to max memory.
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#endif
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typedef enum {
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typedef enum
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{
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CV29_LOCO_DIR = 0b00000001, /** bit 0: Locomotive Direction: "0" = normal, "1" = reversed */
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CV29_F0_LOCATION = 0b00000010, /** bit 1: F0 location: "0" = bit 4 in Speed and Direction instructions, "1" = bit 4 in function group one instruction */
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CV29_APS = 0b00000100, /** bit 2: Alternate Power Source (APS) "0" = NMRA Digital only, "1" = Alternate power source set by CV12 */
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@@ -143,7 +144,8 @@ typedef enum {
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CV29_ACCESSORY_DECODER = 0b10000000, /** bit 7: "0" = Multi-Function Decoder Mode "1" = Accessory Decoder Mode */
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} CV_29_BITS;
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typedef enum {
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typedef enum
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{
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#ifdef NMRA_DCC_ENABLE_14_SPEED_STEP_MODE
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SPEED_STEP_14 = 15, /**< ESTOP=0, 1 to 15 */
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#endif
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@@ -151,12 +153,14 @@ typedef enum {
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SPEED_STEP_128 = 127 /**< ESTOP=0, 1 to 127 */
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} DCC_SPEED_STEPS;
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typedef enum {
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typedef enum
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{
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DCC_DIR_REV = 0, /** The locomotive to go in the reverse direction */
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DCC_DIR_FWD = 1, /** The locomotive should move in the forward direction */
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} DCC_DIRECTION;
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typedef enum {
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typedef enum
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{
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DCC_ADDR_SHORT, /** Short address is used. The range is 0 to 127. */
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DCC_ADDR_LONG, /** Long Address is used. The range is 1 to 10239 */
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} DCC_ADDR_TYPE;
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@@ -209,7 +213,8 @@ typedef enum
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//#define DCC_DBGVAR
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#ifdef DCC_DBGVAR
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typedef struct countOf_t {
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typedef struct countOf_t
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{
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unsigned long Tel;
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unsigned long Err;
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} countOf_t ;
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